BD3533FVM-TL

更新时间： 2024-01-09 12:42:05

品牌	Logo	应用领域
罗姆 - ROHM		总线通信稳压器驱动程序和接口接口集成电路动态存储器双倍数据速率
页数	文件大小	规格书
17页	669K
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中文翻译

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数据手册

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BD3533FVM-TL 数据手册

TECHNICAL NOTE

High-performance Regulator IC Series for PCs

Termination Regulators

for DDR-SDRAMs

BD3533F/FVM/EKN(1A),BD3531F(1.5A),BD3532F/EFV/KN(3A)

Description

BD3533/31/32 is a termination regulator compatible with JEDEC DDR-SDRAM, which functions as a linear power supply

incorporating an N-channel MOSFET and provides a sink/source current capability up to 1A, 1.5A, and 3A respectively.

built-in high-speed OP-AMP specially designed offers an excellent transient response. Requires 3.3 volts or 5.0 volts as a

bias power supply to drive the N-channel MOSFET. Has an independent reference voltage input pin (VDDQ) and an

independent feedback pin (VTTS) to maintain the accuracy in voltage required by JEDEC, and offers an excellent output

voltage accuracy and load regulation. Also has a reference power supply output pin (VREF) for DDR-SDRAM or a

memory controller. When EN pin turns to “Low”, VTT output becomes “Hi-Z” while VREF output is kept unchanged,

compatible with “Self Refresh” state of DDR-SDRAM.

Features

1) Incorporates a push-pull power supply for termination (VTT)

2) Incorporates a reference voltage circuit (VREF)

3) Incorporates an enabler

4) Incorporates an undervoltage lockout (UVLO)

5). Employs SOP8 package

6) Employs MSOP8 package

7) Employs HQFN20V package

8) Employs HTSSOP-B20 package

9) Employs VQFN28V package

10) Incorporates a thermal shutdown protector (TSD)

11) Operates with input voltage from 2.7 to 5.5 volts

12) Compatible with Dual Channel (DDR-II)

Use

Power supply for DDR I/II - SDRAM

●Line up

Parameter

Output Current

Vcc Range

BD3533F/FVM/EKN

±1.0A

BD3531F

±1.5A

BD3532F/EFV/KN

±3Ａ

4.3～5.5V

2.7V～5.5V

4.5V～5.5V

Soft Start Function

Temperature

Package

○

-20～100℃

-10～100℃

SOP8

-40～100℃

SOP8/MSOP8/HQFN20V

SOP8/HTSSOP-B20/VQFN28

Oct. 2008

12 3 4 5 6 7...17

中文翻译

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