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BD3538F_10 PDF预览

BD3538F_10

更新时间: 2024-02-14 01:00:54
品牌 Logo 应用领域
罗姆 - ROHM 稳压器动态存储器双倍数据速率
页数 文件大小 规格书
11页 379K
描述
Termination Regulators for DDR-SDRAMs

BD3538F_10 数据手册

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High Performance Regulators for PCs  
Termination Regulators  
for DDR-SDRAMs  
BD3538F,BD3538HFN  
No.10030EAT33  
Description  
BD3538F/HFN is a termination regulator compatible with JEDEC DDR-SDRAM, which functions as a linear power supply  
incorporating an N-channel MOSFET and provides a sink/source current capability up to 1A respectively. A built-in  
high-speed OP-AMP specially designed offers an excellent transient response. Requires 3.3 volts or 5.0 volts as a bias  
power supply to drive the N-channel MOSFET. Has an independent reference voltage input pin (VDDQ) and an  
independent feedback pin (VTTS) to maintain the accuracy in voltage required by JEDEC, and offers an excellent output  
voltage accuracy and load regulation. Also has a reference power supply output pin (VREF) for DDR-SDRAM or a memory  
controller. When EN pin turns to “Low”, VTT output becomes “Hi-Z” while VREF output is kept unchanged, compatible with  
“Self Refresh” state of DDR-SDRAM.  
Features  
1) Incorporates a push-pull power supply for termination (VTT)  
2) Incorporates a reference voltage circuit (VREF)  
3) Incorporates an enabler  
4) Incorporates an undervoltage lockout (UVLO)  
5) Employs SOP8 package  
6) Employs HSON8 package  
7) Incorporates a thermal shutdown protector (TSD)  
8) Operates with input voltage from 2.7 to 5.5 volts  
9) Compatible with Dual Channel (DDR-II)  
Use  
Power supply for DDR I / II / III - SDRAM  
Absolute Maximum Ratings  
Ratings  
BD3538HFN  
7 *1*2  
7 *1*2  
Parameter  
Symbol  
Unit  
BD3538F  
7 *1*2  
Input Voltage  
VCC  
VEN  
V
V
Enable Input Voltage  
Termination Input Voltage  
VDDQ Reference Voltage  
Output Current  
7 *1*2  
7 *1*2  
7 *1*2  
VTT_IN  
VDDQ  
ITT  
7 *1*2  
7 *1*2  
V
V
1
1
A
Power Dissipation1  
Pd1  
560 *3  
690 *4  
-
630 *5  
1350 *6  
1750 *7  
-40+105  
-55+150  
+150  
mW  
mW  
mW  
Power Dissipation2  
Pd2  
Power Dissipation3  
Pd3  
Operating Temperature Range  
Storage Temperature Range  
Tstg  
-40+105  
-55+150  
+150  
Tjmax  
Tjmax  
Maximum Junction Temperature  
*1 Should not exceed Pd.  
*2 Instantaneous surge voltage, back electromotive force and voltage under less than 10% duty cycle.  
*3 Reduced by 4.48mW for each increase in Ta of 1over 25(With no heat sink).  
*4 Reduced by 5.52mW for each increase in Ta of 1over 25(When mounted on a board 70mm×70mm×1.6mm Glass-epoxyPCB).  
*5 Reduced by 5.04mW/for each increase in Ta25(when mounted on a 70mm×70mm×1.6mm glass-epoxy board, 1-layer)  
On less than 0.2% (percentage occupied by copper foil.  
*6 Reduced by 10.8mW/for each increase in Ta25(when mounted on a 70mm×70mm×1.6mm glass-epoxy board, 1-layer)  
On less than 7.0% (percentage occupied by copper foil.  
*7 Reduced by 14.0mW/for each increase in Ta25(when mounted on a 70mm×70mm×1.6mm glass-epoxy board, 1-layer)  
On less than 65.0% (percentage occupied by copper foil.  
www.rohm.com  
© 2010 ROHM Co., Ltd. All rights reserved.  
2010.05 - Rev.A  
1/10  

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