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AT28HC256E-12DM/883 PDF预览

AT28HC256E-12DM/883

更新时间： 2024-11-23 20:35:03
品牌 Logo 应用领域
美国微芯 - MICROCHIP 可编程只读存储器电动程控只读存储器电可擦编程只读存储器内存集成电路
页数 文件大小 规格书
24页 467K
描述
EEPROM, 32KX8, 120ns, Parallel, CMOS, CDIP28

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中文翻译

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AT28HC256E-12DM/883 技术参数

生命周期：Active包装说明：DIP-28
Reach Compliance Code：compliantECCN代码：3A001.A.2.C
HTS代码：8542.32.00.51风险等级：5.65
最长访问时间：120 ns其他特性：AUTOMATIC WRITE
JESD-30 代码：R-GDIP-T28JESD-609代码：e0
长度：37.215 mm内存密度：262144 bit
内存集成电路类型：EEPROM内存宽度：8
湿度敏感等级：1功能数量：1
端子数量：28字数：32768 words
字数代码：32000工作模式：ASYNCHRONOUS
最高工作温度：125 °C最低工作温度：-55 °C
组织：32KX8封装主体材料：CERAMIC, GLASS-SEALED
封装代码：DIP封装形状：RECTANGULAR
封装形式：IN-LINE并行/串行：PARALLEL
峰值回流温度（摄氏度）：NOT SPECIFIED编程电压：5 V
认证状态：Not Qualified筛选级别：MIL-STD-883 Class C
座面最大高度：5.72 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：MILITARY端子面层：TIN LEAD
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：15.24 mm最长写入周期时间 (tWC)：10 ms
Base Number Matches：1

AT28HC256E-12DM/883 数据手册

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Features  
• Fast Read Access Time – 70 ns  
• Automatic Page Write Operation  
– Internal Address and Data Latches for 64 Bytes  
– Internal Control Timer  
• Fast Write Cycle Times  
– Page Write Cycle Time: 3 ms or 10 ms Maximum  
– 1 to 64-byte Page Write Operation  
• Low Power Dissipation  
256K (32K x 8)  
High-speed  
Parallel  
– 80 mA Active Current  
– 3 mA Standby Current  
• Hardware and Software Data Protection  
• DATA Polling for End of Write Detection  
• High Reliability CMOS Technology  
– Endurance: 104 or 105 Cycles  
– Data Retention: 10 Years  
EEPROM  
• Single 5V 10% Supply  
• CMOS and TTL Compatible Inputs and Outputs  
• JEDEC Approved Byte-wide Pinout  
• Full Military and Industrial Temperature Ranges  
• Green (Pb/Halide-free) Packaging Option  
AT28HC256  
1. Description  
The AT28HC256 is a high-performance electrically erasable and programmable read-  
only memory. Its 256K of memory is organized as 32,768 words by 8 bits. Manufac-  
tured with Atmel’s advanced nonvolatile CMOS technology, the AT28HC256 offers  
access times to 70 ns with power dissipation of just 440 mW. When the AT28HC256  
is deselected, the standby current is less than 5 mA.  
The AT28HC256 is accessed like a Static RAM for the read or write cycle without the  
need for external components. The device contains a 64-byte page register to allow  
writing of up to 64 bytes simultaneously. During a write cycle, the address and 1 to 64  
bytes of data are internally latched, freeing the addresses and data bus for other oper-  
ations. Following the initiation of a write cycle, the device will automatically write the  
latched data using an internal control timer. The end of a write cycle can be detected  
by DATA Polling of I/O7. Once the end of a write cycle has been detected a new  
access for a read or write can begin.  
Atmel’s 28HC256 has additional features to ensure high quality and manufacturability.  
The device utilizes internal error correction for extended endurance and improved  
data retention characteristics. An optional software data protection mechanism is  
available to guard against inadvertent writes. The device also includes an extra  
64 bytes of EEPROM for device identification or tracking.  
0007N–PEEPR–9/09  
1234567...24

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