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AT17LV002A-10Q1 PDF预览

AT17LV002A-10Q1

更新时间: 2024-11-17 22:06:19
品牌 Logo 应用领域
爱特美尔 - ATMEL 存储可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
14页 233K
描述
FPGA Configuration EEPROM Memory

AT17LV002A-10Q1 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:TQFP,针数:32
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.77
JESD-30 代码:S-PQFP-G32长度:7 mm
内存密度:2097152 bit内存集成电路类型:CONFIGURATION MEMORY
内存宽度:1功能数量:1
端子数量:32字数:2097152 words
字数代码:2000000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:2MX1封装主体材料:PLASTIC/EPOXY
封装代码:TQFP封装形状:SQUARE
封装形式:FLATPACK, THIN PROFILE并行/串行:SERIAL
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.45 V最小供电电压 (Vsup):3.15 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD宽度:7 mm
Base Number Matches:1

AT17LV002A-10Q1 数据手册

 浏览型号AT17LV002A-10Q1的Datasheet PDF文件第2页浏览型号AT17LV002A-10Q1的Datasheet PDF文件第3页浏览型号AT17LV002A-10Q1的Datasheet PDF文件第4页浏览型号AT17LV002A-10Q1的Datasheet PDF文件第5页浏览型号AT17LV002A-10Q1的Datasheet PDF文件第6页浏览型号AT17LV002A-10Q1的Datasheet PDF文件第7页 
Features  
Serial EEPROM Family for Configuring FLEX® Devices  
Simple Interface to SRAM FPGAs  
EE Programmable 2-Mbit Serial Memories Designed to Store Configuration Programs  
for Field Programmable Gate Arrays (FPGAs)  
Cascadable Read Back to Support Additional Configurations or Future Higher-density  
Arrays  
Low-power CMOS EEPROM Process  
Programmable Reset Polarity  
Available in the Space-efficient Surface-mount PLCC Package  
In-System Programmable via 2-wire Bus  
FPGA  
Emulation of Atmel’s AT24CXXX Serial EEPROMs  
Available in 3.3V 5% LV and 5V 5% C Versions  
System-friendly READY Pin  
Configuration  
EEPROM  
Memory  
2-megabit  
Replacement for AT17C/LV002A  
Description  
The AT17C002A and AT17LV002A (high-density AT17A Series) FPGA Configuration  
EEPROMs (configurators) provide an easy-to-use, cost-effective configuration mem-  
ory for programming Altera FLEX devices. The AT17A Series is packaged in the  
popular 20-lead PLCC and the 32-lead TQFP. The AT17A Series family uses a simple  
serial-access procedure to configure one or more FPGA devices. The AT17A Series  
organization supplies enough memory to configure one or multiple smaller FPGAs.  
Using a feature of the AT17A Series, the user can select the polarity of the reset func-  
tion by programming internal EEPROM bytes. The AT17A parts generate their own  
internal clock and can be used as a system “master” for loading the FPGA devices.  
Altera Pinout  
AT17C002A  
AT17LV002A  
The Atmel devices also support a system-friendly READY pin. The READY pin is used  
to simplify system power-up considerations.  
The AT17A Series Configurators can be programmed with industry-standard program-  
mers or Atmel’s ATDH2200E Programming Kit.  
Rev. 2280B–08/01  

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