5秒后页面跳转
AS7C331MNTD36A-167TQCN PDF预览

AS7C331MNTD36A-167TQCN

更新时间: 2024-11-24 03:15:47
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器
页数 文件大小 规格书
22页 454K
描述
ZBT SRAM, 1MX36, 7.5ns, CMOS, PQFP100, 14 X 20 MM, LEAD FREE, TQFP-100

AS7C331MNTD36A-167TQCN 数据手册

 浏览型号AS7C331MNTD36A-167TQCN的Datasheet PDF文件第2页浏览型号AS7C331MNTD36A-167TQCN的Datasheet PDF文件第3页浏览型号AS7C331MNTD36A-167TQCN的Datasheet PDF文件第4页浏览型号AS7C331MNTD36A-167TQCN的Datasheet PDF文件第5页浏览型号AS7C331MNTD36A-167TQCN的Datasheet PDF文件第6页浏览型号AS7C331MNTD36A-167TQCN的Datasheet PDF文件第7页 
April 2004  
AS7C331MNTD32A  
AS7C331MNTD36A  
®
3.3V 1M × 32/36 SRAM with NTDTM  
Features  
• Asynchronous output enable control  
• Organization: 1,048,576 words × 32 or 36 bits  
• NTD™1 architecture for efficient bus operation  
• Fast clock speeds to 200 MHz in LVTTL/LVCMOS  
• Fast clock to data access: 3.1/3.4/3.8 ns  
• Fast OE access time: 3.1/3.4/3.8 ns  
• Available in 100-pin TQFP and 165-ball BGA packages  
• Byte write enables  
• Clock enable for operation hold  
• Multiple chip enables for easy expansion  
• 3.3V core power supply  
• Fully synchronous operation  
• Flow-through or pipelined mode  
• 2.5V or 3.3V I/O operation with separate VDDQ  
• Self-timed write cycles  
• Interleaved or linear burst modes  
• Snooze mode for standby operation  
• Boundary scan using IEEE 1149.1 JTAG function  
1. NTD™ is a trademark of Alliance Semiconductor Corporation. All trade-  
marks mentioned in this document are the property of their respective owners.  
Logic block diagram  
20  
20  
Q
A[19:0]  
D
Address  
register  
Burst logic  
CLK  
D
Q
CE0  
CE1  
CE2  
Write delay  
addr. registers  
20  
CLK  
R/W  
BWa  
Control  
logic  
CLK  
BWb  
BWc  
BWd  
ADV / LD  
FT  
1M x 32/36  
SRAM  
LBO  
ZZ  
CLK  
Array  
32/36  
32/36  
DQ[a,b,c,d]  
Data  
Input  
Register  
D
Q
32/36  
32/36  
CLK  
32/36  
CLK  
CEN  
CLK  
Output  
Register  
OE  
32/36  
OE  
DQ[a,b,c,d]  
Selection guide  
-200  
5
-167  
6
-133  
7.5  
Units  
ns  
Minimum cycle time  
Maximum pipelined clock frequency  
Maximum pipelined clock access time  
Maximum operating current  
200  
3.1  
400  
120  
70  
167  
3.4  
350  
110  
70  
133  
3.8  
MHz  
ns  
325  
100  
70  
mA  
mA  
mA  
Maximum standby current  
Maximum CMOS standby current (DC)  
4/26/04, V 1.2  
Alliance Semiconductor  
P. 1 of 22  
Copyright © Alliance Semiconductor. All rights reserved.  

与AS7C331MNTD36A-167TQCN相关器件

型号 品牌 获取价格 描述 数据表
AS7C331MNTD36A-167TQI ISSI

获取价格

ZBT SRAM, 1MX36, 7.5ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100
AS7C331MNTD36A-167TQIN ISSI

获取价格

ZBT SRAM, 1MX36, 7.5ns, CMOS, PQFP100, 14 X 20 MM, LEAD FREE, TQFP-100
AS7C331MNTD36A-200TQC ALSC

获取价格

3.3V 1M x 32/36 Pipelined SRAM with NTD
AS7C331MNTD36A-200TQCN ALSC

获取价格

3.3V 1M x 32/36 Pipelined SRAM with NTD
AS7C331MNTD36A-200TQI ALSC

获取价格

3.3V 1M x 32/36 Pipelined SRAM with NTD
AS7C331MNTD36A-200TQIN ALSC

获取价格

3.3V 1M x 32/36 Pipelined SRAM with NTD
AS7C331MNTF18A ALSC

获取价格

3.3V 1M x 18 Flowthrough Synchronous SRAM with NTD
AS7C331MNTF18A-10BIN ALSC

获取价格

ZBT SRAM, 1MX18, 10ns, CMOS, PBGA165, LEAD FREE, BGA-165
AS7C331MNTF18A-10TQC ALSC

获取价格

3.3V 1M x 18 Flowthrough Synchronous SRAM with NTD
AS7C331MNTF18A-10TQCN ALSC

获取价格

3.3V 1M x 18 Flowthrough Synchronous SRAM with NTD