Datasheet > AN460

AN460

更新时间： 2022-11-25 11:11:24

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
8页	68K
描述
Using the P82B96 for bus interface

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AN460 数据手册

Philips Semiconductors

Application note

Using the P82B96 for bus interface

AN460

LINK VIA A DIFFERENTIAL BUS

Figure 6 shows an SDA signal interfaced via P82B96 and the

PCA82C250 to a balanced twisted pair bus capable of supporting

over 100 nodes. In this way over 100 separate I C nodes can be

interconnected, retaining the conventional I C protocol. Operation

TECHNICAL ISSUES

There are a number of issues which may need to be considered in

the application of the P82B96. These are discussed below.

Transient Signal Protection

The table of maximum ratings of the data sheet specifies the voltage

which may be applied to any pin with respect to GND as being from

-0.3 to +18 volts.

over short distances (e.g., 50 meters) at 100 kHz is possible. To

meet the I C timing requirements for the ‘acknowledge’ bit it is

necessary to select a lower clock speed when working with very

long busses. As a minimum, the ‘round trip’ signal propagation

delay, from any one node to another node and back again, must be

less than the clock ‘low’ period. Signals will typically travel 1 meter in

5ns.

No ESD protection diodes have been applied between the input and

output pins and V as these would prevent the very useful feature

of being able to operate inputs and outputs above the V rail, up to

15 volts.

There is an internal diode from each pin to V . This diode will

Note that in this example, the CAN bus hardware is only a transport

medium for carrying I C signals. The I C signal format is not being

converted to CAN bus software data format by the PCA82C250.

conduct if negative voltages are applied to any pin. The -0.3 V rating

is applied to ensure these diodes never conduct. Currents in these

diodes can cause unpredictable behavior.

In applications where these voltage ratings could be exceeded, e.g.

by transient signals induced into long buffered bus lines, Schottky

diodes and 15 V zener diode clamps should be fitted between GND

and the buffered bus pins as shown in Figure 7.

+5 V

I C

SDA

(SDA)

TxD

RxD

TxD

RxD

(SDA)

canh

canl

(SDA)

1/2 PB2B96

PCA82C250

+5 V

I C

SDA

TxD

RxD

(SDA)

1/2 PB2B96

PCA82C250

LINE TERMINATION

Example using CAN hardware allows linking u 100 nodes

Hardware for carrying SCL signals is identical to SDA (shown here)

SU01017

Figure 6. Linking I C nodes via a differential bus

2001 Feb 14

1 2 345 6 7 8

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