Datasheet > ADCLK925_15

ADCLK925_15

更新时间： 2022-02-26 11:56:12

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
16页	1104K
描述
Ultrafast SiGe ECL Clock/Data Buffers

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ADCLK925_15 数据手册

ADCLK905/ADCLK907/ADCLK925

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

PIN 1

INDICATOR

12 Q

11 Q

10 NC

ADCLK905

TOP VIEW

(Not to Scale)

NC = NO CONNECT

Figure 4. ADCLK905 Pin Configuration

Table 4. Pin Function Descriptions for 1:1 ADCLK905 Buffer

Pin No.

Mnemonic

Description

Noninverting Input.

Inverting Input.

3, 4, 5, 6,

9, 10

No Connect. No physical connection to the die.

7, 14

8, 13

V_EE

V_CC

Negative Supply Voltage.

Positive Supply Voltage.

Inverting Output.

Noninverting Output.

V_REF

V_T

Reference Voltage. Reference voltage for ꢀiasing ac-coupled inputs.

Center Tap. Center tap of 100 Ω input resistor.

Heat Sink

No Connect. The metallic ꢀack surface of the package is not electrically connected to any part of the circuit.

It can ꢀe left floating for optimal electrical isolation ꢀetween the package handle and the suꢀstrate of the die.

It can also ꢀe soldered to the application ꢀoard if improved thermal and/or mechanical staꢀility is desired.

Exposed metal at the corners of the package is connected to this ꢀack surface. Allow sufficient clearance

to vias and other components.

PIN 1

INDICATOR

12 Q1

11 Q1

10 Q2

ADCLK907

TOP VIEW

(Not to Scale)

Figure 5. ADCLK907 Pin Configuration

Table 5. Pin Function Descriptions for Dual 1:1 ADCLK907 Buffer

Pin No.

Mnemonic

Description

V_T2

Noninverting Input 1.

Inverting Input 1.

Noninverting Input 2.

Inverting Input 2.

Center Tap 2. Center tap of 100 Ω input resistor, Channel 2.

Reference Voltage 2. Reference voltage for ꢀiasing ac-coupled inputs, Channel 2.

V_REF

V_EE

V_CC

7, 14

8, 13

Negative Supply Voltage.

Positive Supply Voltage. Pin 8 and Pin 13 are not strapped internally.

Inverting Output 2.

Rev. 0 | Page 6 of 16

1...3 4 567 8 9...16

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