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ADC1410S065HN/C1

更新时间： 2024-11-26 06:36:19
品牌 Logo 应用领域
恩智浦 - NXP 转换器模数转换器双倍数据速率
页数 文件大小 规格书
37页 277K
描述
Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs

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ADC1410S065HN/C1 技术参数

生命周期：Transferred零件包装代码：QFN
包装说明：HVQCCN,针数：40
Reach Compliance Code：unknownECCN代码：3A991.C.3
HTS代码：8542.39.00.01风险等级：5.68
Is Samacsys：N最大模拟输入电压：2 V
最小模拟输入电压：转换器类型：ADC, PROPRIETARY METHOD
JESD-30 代码：S-PQCC-N40长度：6 mm
最大线性误差 (EL)：0.0305%模拟输入通道数量：1
位数：14功能数量：1
端子数量：40最高工作温度：85 °C
最低工作温度：-40 °C输出位码：OFFSET BINARY, 2'S COMPLEMENT BINARY
输出格式：PARALLEL, WORD封装主体材料：PLASTIC/EPOXY
封装代码：HVQCCN封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE认证状态：Not Qualified
采样速率：65 MHz采样并保持/跟踪并保持：SAMPLE
座面最大高度：1 mm标称供电电压：3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
宽度：6 mmBase Number Matches：1

ADC1410S065HN/C1 数据手册

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ADC1410S series  
Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps;  
CMOS or LVDS DDR digital outputs  
Rev. 03 — 12 April 2010  
Preliminary data sheet  
1. General description  
The ADC1410S is a single-channel 14-bit Analog-to-Digital Converter (ADC) optimized for  
high dynamic performances and low power consumption at sample rates up to 125 Msps.  
Pipelined architecture and output error correction ensure the ADC1410S is accurate  
enough to guarantee zero missing codes over the entire operating range. Supplied from a  
single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode,  
because of a separate digital output supply. It supports the Low Voltage Differential  
Signalling (LVDS) Double Data Rate (DDR) output standard. An integrated Serial  
Peripheral Interface (SPI) allows the user to easily configure the ADC. The device also  
includes a SPI programmable full-scale to allow flexible input voltage range from  
1 V to 2 V (peak-to-peak). With excellent dynamic performance from the baseband to  
input frequencies of 170 MHz or more, the ADC1410S is ideal for use in communications,  
imaging and medical applications.  
2. Features and benefits  
„ SNR, 72 dBFS; SFDR, 86 dBc  
„ Input bandwidth, 600 MHz  
„ Sample rate up to 125 Msps  
„ 14-bit pipelined ADC core  
„ Power dissipation, 430 mW at 80 Msps  
„ Serial Peripheral Interface (SPI)  
„ Duty cycle stabilizer  
„ Clock input divider by 2 for less jitter  
contribution  
„ Single 3 V supply  
„ Fast OuT of Range (OTR) detection  
„ Flexible input voltage range: 1 V to 2 V „ INL ±1.5 LSB, DNL ±0.5 LSB  
(peak-to-peak).  
„ CMOS or LVDS DDR digital outputs  
„ Offset binary, two’s complement, gray  
code  
„ Pin compatible with the ADC1210S  
„ Power-down and Sleep modes  
series and the ADC1010S series  
„ HVQFN40 package  
3. Applications  
„ Wireless and wired broadband  
„ Portable instrumentation  
communications  
„ Spectral analysis  
„ Imaging systems  
„ Ultrasound equipment  
„ Software define radio  
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ADC1410S125HN/C1 NXP

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 		Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital output

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