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ADC1410S125HN,551 PDF预览

ADC1410S125HN,551

更新时间: 2024-11-26 14:49:27
品牌 Logo 应用领域
恩智浦 - NXP 双倍数据速率
页数 文件大小 规格书
40页 532K
描述
Single 14-bit ADC 125 Msps CMOS or LVDS DDR digital outputs, SOT618-1 (HVQFN40), Tray Dry Pack, Bakeable, Single

ADC1410S125HN,551 技术参数

生命周期:Contact Manufacturer零件包装代码:QFN
针数:40Reach Compliance Code:unknown
风险等级:5.77Is Samacsys:N
Base Number Matches:1

ADC1410S125HN,551 数据手册

 浏览型号ADC1410S125HN,551的Datasheet PDF文件第2页浏览型号ADC1410S125HN,551的Datasheet PDF文件第3页浏览型号ADC1410S125HN,551的Datasheet PDF文件第4页浏览型号ADC1410S125HN,551的Datasheet PDF文件第5页浏览型号ADC1410S125HN,551的Datasheet PDF文件第6页浏览型号ADC1410S125HN,551的Datasheet PDF文件第7页 
ADC1410S series  
Single 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps;  
CMOS or LVDS DDR digital outputs  
Rev. 4 — 24 December 2010  
Product data sheet  
1. General description  
The ADC1410S is a single-channel 14-bit Analog-to-Digital Converter (ADC) optimized for  
high dynamic performance and low power consumption at sample rates up to 125 Msps.  
Pipelined architecture and output error correction ensure the ADC1410S is accurate  
enough to guarantee zero missing codes over the entire operating range. Supplied from a  
single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in CMOS mode,  
because of a separate digital output supply. It supports the Low Voltage Differential  
Signalling (LVDS) Double Data Rate (DDR) output standard. An integrated Serial  
Peripheral Interface (SPI) allows the user to easily configure the ADC. The device also  
includes a programmable full-scale SPI to allow a flexible input voltage range from  
1 V to 2 V (peak-to-peak). With excellent dynamic performance from the baseband to  
input frequencies of 170 MHz or more, the ADC1410S is ideal for use in communications,  
imaging and medical applications.  
2. Features and benefits  
„ SNR, 72 dBFS; SFDR, 86 dBc  
„ Input bandwidth, 600 MHz  
„ Sample rate up to 125 Msps  
„ 14-bit pipelined ADC core  
„ Clock input divided by 2 for less jitter  
„ Single 3 V supply  
„ Power dissipation, 430 mW at 80 Msps  
„ Serial Peripheral Interface (SPI)  
„ Duty cycle stabilizer  
„ Fast OuT of Range (OTR) detection  
„ Flexible input voltage range: 1 V (p-p) to „ CMOS or LVDS DDR digital outputs  
2 V (p-p)  
„ Offset binary, two’s complement, gray  
„ Pin compatible with the ADC1210S  
code  
series and the ADC1010S series  
„ Power-down and Sleep modes  
„ HVQFN40 package  
3. Applications  
„ Wireless and wired broadband  
„ Portable instrumentation  
communications  
„ Spectral analysis  
„ Imaging systems  
„ Ultrasound equipment  
„ Software defined radio  
 
 
 

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