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AD9548BCPZ-REEL7 PDF预览

AD9548BCPZ-REEL7

更新时间： 2024-02-06 01:53:30
品牌 Logo 应用领域
亚德诺 - ADI 晶体时钟发生器微控制器和处理器外围集成电路
页数 文件大小 规格书
112页 1935K
描述
Quad/Octal Input Network Clock Generator/Synchronizer

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AD9548BCPZ-REEL7 技术参数

是否无铅：含铅是否Rohs认证：符合
生命周期：Active零件包装代码：QFN
包装说明：HVQCCN,针数：88
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.3
Is Samacsys：NJESD-30 代码：S-XQCC-N88
JESD-609代码：e3长度：12 mm
湿度敏感等级：3端子数量：88
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260主时钟/晶体标称频率：1000 MHz
认证状态：Not Qualified座面最大高度：0.9 mm
最大供电电压：1.89 V最小供电电压：1.71 V
标称供电电压：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：40宽度：12 mm
uPs/uCs/外围集成电路类型：CLOCK GENERATOR, OTHERBase Number Matches：1

AD9548BCPZ-REEL7 数据手册

 浏览型号AD9548BCPZ-REEL7的Datasheet PDF文件第105页浏览型号AD9548BCPZ-REEL7的Datasheet PDF文件第106页浏览型号AD9548BCPZ-REEL7的Datasheet PDF文件第107页浏览型号AD9548BCPZ-REEL7的Datasheet PDF文件第109页浏览型号AD9548BCPZ-REEL7的Datasheet PDF文件第110页浏览型号AD9548BCPZ-REEL7的Datasheet PDF文件第111页 
AD9548  
If x is an integer, then y = x. Otherwise, y is the nearest integer to x.  
For example, round(2.1) = 2, round(2.5) = 3, and round(−3.1) = −3.  
decimal point of α0 to the left to accommodate small values of α.  
Calculation of α1 is a two-step process, as follows:  
The ceil() function  
w = if(α <1, − ceil(log2 (α)), 0)  
y = ceil(x)  
α1 = if(α <1, min  
[
63, max(0, w) , 0)  
]
If x is an integer, then y = x. Otherwise, y is the next integer to the  
right on the number line. For example, ceil(2.8) = 3, whereas  
ceil(−2.8) = −2.  
If gain is necessary (that is, α > 1), then it is beneficial to apply  
most or all of it to the front-end gain (α2) implying that the  
calculation of α2 is to be done before α3. Calculation of α2 is a  
three-step process that leads directly to the calculation of α3.  
The min() function  
y = min(x0, x1, ... xn)  
x = if(α >1, ceil(log2 (α)), 0)  
where x0 through xn is a list of real numbers, and the value of y is  
the number in the list that is the farthest to the left on the number  
line.  
[
y = if(α >1, min 22, max(0, x) , 0)  
]
α2 = if(y ≥ 8, 7, y)  
The max() function  
α3 = if (y ≥ 8, y − 7, 0)  
y = max(x0, x1, ... xn)  
Calculation of α0 is a two-step process, as follows:  
where x0 through xn is a list of real numbers, and the value of y is  
the number in the list that is the farthest to the right on the  
number line.  
z = round(α × 216+α −α  
)
2 −α3  
1
α0 = min  
[
65,535, max(1, z)  
]
The log2() function  
Using the example value of α = 0.012735446 yields  
ln(x)  
log2 (x) =  
ln(2)  
w = 6, so α1 = 6  
where ln() is the natural log function and x is a positive, nonzero  
number.  
x = 0 and y = 0, so α2 = 0 and α3 = 0  
z = 53,416.332099584, so α0 = 53,416  
Assume that the coefficient calculations for α, β, γ, and δ yield the  
following results:  
This leads to the following quantized value, which is very close to  
the desired value of 0.012735446:  
α = 0.012735446  
β = −6.98672×10−5  
αquantized = 53416× 2−22 ≈ 0.01273566821  
CALCULATION OF THE β REGISTER VALUES  
γ = −7.50373×10−5  
δ = 0.002015399  
The quantized β coefficient consists of two components, β0 and β1  
according to  
These values are floating point numbers that must be quantized  
according to the bit widths of the linear and exponential  
− β ≈ βquantized = β0 × 2−(17 + β )  
1
components of the coefficients as they appear in the register map.  
Note that the calculations that follow indicate a positive value for  
the register entries of β and γ. The reason is that β and γ, which  
are supposed to be negative values, are stored in the AD9548  
registers as positive values. The AD9548 converts the stored values  
to negative numbers within its signal processing core. A detailed  
description of the register value computations for α, β, γ, and δ is  
contained in the Calculation of the α Register Values section to  
the Calculation of the δ Register Values section.  
where β0 and β1 are the register values. Calculation of β1 is a two-  
step process that leads to the calculation of β0, which is also a two-  
step process.  
x = −ceil(log2 ( β ))  
β1 = min  
y = round( β × 217 + β  
[
31, max(0, x)  
]
1
)
β0 = min  
[
131,071 , max(1, y)  
]
CALCULATION OF THE α REGISTER VALUES  
Using the example value of −β = 6.98672 × 10−5 yields  
x = 13, so β1 = 13  
The quantized α coefficient consists of four components, α0, α1,  
α2, and α3 according to  
α ≈ αquantized = α0 × 216−α +α +α  
1
2
3
y = 75,019.3347657728, so β0 = 75,019  
where α0, α1, α2, and α3 are the register values. α2 provides front-  
end gain and α3 provides back-end gain, and α1 shifts the binary  
Rev. 0 | Page 108 of 112  
 
 
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与AD9548BCPZ-REEL7相关器件

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AD9549ABCPZ-REEL7 ADI Dual Input Network Clock Generator/Synchronizer

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AD9549BCPZ ADI Dual Input Network Clock Generator/Synchronizer

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AD9549BCPZ-REEL7 ADI IC 750 MHz, OTHER CLOCK GENERATOR, QCC64, 9 X 9 MM, ROHS COMPLIANT, MO-220VMMD, LFCSP-64,

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