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9ZX21901BKLFT PDF预览

9ZX21901BKLFT

更新时间: 2024-01-22 21:32:53
品牌 Logo 应用领域
艾迪悌 - IDT 时钟驱动器逻辑集成电路PC
页数 文件大小 规格书
16页 170K
描述
19-Output Differential Zbuffer for PCIe Gen2/3 and QPI

9ZX21901BKLFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:VFQFPN
包装说明:HVQCCN,针数:72
Reach Compliance Code:compliant风险等级:5.73
Samacsys Description:VFQFP-N 10.0 X 10.0 X 0.9 MM - NO LEAD系列:9ZX
输入调节:DIFFERENTIAL MUXJESD-30 代码:S-XQCC-N72
JESD-609代码:e3长度:10 mm
逻辑集成电路类型:PLL BASED CLOCK DRIVER湿度敏感等级:3
功能数量:1反相输出次数:
端子数量:72实输出次数:38
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
座面最大高度:1 mm最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10 mm
Base Number Matches:1

9ZX21901BKLFT 数据手册

 浏览型号9ZX21901BKLFT的Datasheet PDF文件第6页浏览型号9ZX21901BKLFT的Datasheet PDF文件第7页浏览型号9ZX21901BKLFT的Datasheet PDF文件第8页浏览型号9ZX21901BKLFT的Datasheet PDF文件第10页浏览型号9ZX21901BKLFT的Datasheet PDF文件第11页浏览型号9ZX21901BKLFT的Datasheet PDF文件第12页 
9ZX21901B  
19-Output Differential Zbuffer for PCIe Gen2/3 and QPI  
Clock Periods - Differential Outputs with Spread Spectrum Disabled  
Measurement Window  
1 Clock  
1us  
-SSC  
0.1s  
- ppm  
0.1s  
0.1s  
+ ppm  
Long-Term  
Average  
Max  
1us  
+SSC  
Short-Term  
Average  
Max  
1 Clock  
Center  
Freq.  
MHz  
SSC OFF  
-c2c jitter  
AbsPer  
Min  
0 ppm  
Period  
Nominal  
+c2c jitter Units Notes  
AbsPer  
Max  
Short-Term Long-Term  
Average  
Min  
Average  
Min  
100.00  
133.33  
9.94900  
7.44925  
9.99900  
7.49925  
10.00000  
7.50000  
10.00100  
7.50075  
10.05100  
7.55075  
ns  
ns  
1,2,3  
1,2,4  
DIF  
Clock Periods - Differential Outputs with Spread Spectrum Enabled  
Measurement Window  
1 Clock  
1us  
-SSC  
0.1s  
- ppm  
0.1s  
0.1s  
+ ppm  
Long-Term  
Average  
Max  
1us  
+SSC  
Short-Term  
Average  
Max  
1 Clock  
Center  
Freq.  
MHz  
SSC ON  
-c2c jitter  
AbsPer  
Min  
0 ppm  
Period  
Nominal  
+c2c jitter Units Notes  
AbsPer  
Max  
Short-Term Long-Term  
Average  
Min  
Average  
Min  
99.75  
133.00  
9.94906  
7.44930  
9.99906  
7.49930  
10.02406  
7.51805  
10.02506  
7.51880  
10.02607  
7.51955  
10.05107  
7.53830  
10.10107  
7.58830  
ns  
ns  
1,2,3  
1,2,4  
DIF  
Notes:  
1Guaranteed by design and characterization, not 100% tested in production.  
2 All Long Term Accuracy specifications are guaranteed with the assumption that the input clock complies with CK420BQ/CK410B+  
accuracy requirements (+/-100ppm). The 9ZX21901 itself does not contribute to ppm error.  
3
Driven by SRC output of main clock, 100 MHz PLL Mode or Bypass mode  
4
Driven by CPU output of main clock, 133 MHz PLL Mode or Bypass mode  
Power Management Table  
Inputs  
Control Bits/Pins  
DIF(5:12)/  
OE# Pin DIF(5:12)#  
Outputs  
DFB_OUT/  
DFB_OUT#  
PLL  
State  
DIF_IN/  
DIF_IN#  
SMBus  
EN bit  
Other DIF/  
DIF#  
CKPWRGD_PD#  
Hi-Z1  
Hi-Z1  
Hi-Z1  
Running  
Running  
Running  
0
1
X
X
0
1
1
X
OFF  
ON  
ON  
ON  
Hi-Z1  
X
Hi-Z1  
Running  
0
1
Running  
Hi-Z1  
Running  
Running  
NOTE:  
1. Due to external pull down resistors, HI-Z results in Low/Low on the True/Complement outputs  
Differential Output Termination Table  
DIF Zo ( ) Iref ( ) Rs ( ) Rp ( )  
100  
85  
475  
412  
33  
27  
50  
43.2  
9ZX21901 Differential Test Loads  
10 inches  
Rs  
Differential Zo  
2pF  
2pF  
Rp  
Rp  
Rs  
HCSL Output  
Buffer  
IDT® 19-Output Differential Zbuffer for PCIe Gen2/3 and QPI  
1586J - 12/08/11  
9

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