Datasheet
9ZXL06x2E/9ZXL08xxE/9ZXL12x2E
6 to 12-Output Buffers for PCIe Gen1–5 and UPI with SMBus Write Protect
The 9ZXL revision E family of Zero-Delay/Fanout
Buffers (ZDB, FOB) with SMBus Write Protect are
Features
▪ SMBus Write Protect pin prevents SMBus against
accidental writes
2nd-generation enhanced performance buffers for
PCIe and CPU applications. The devices have
hardware SMBUS write protection to prevent
accidental writes. The family meets all published
QPI/UPI, DB2000Q and PCIe Gen1–5 jitter
specifications. Devices range from 6 to 12 outputs,
with each output having an OE# pin to support the
PCIe CLKREQ# function for low power states. All
devices meet DB2000Q, DB1200ZL and DB800ZL
jitter and skew requirements.
▪ 6–12 Low-power HCSL (LP-HCSL) outputs
▪ Integrated terminations eliminate up to 4 resistors
per output pair
▪ Dedicated OE# pins support PCIe CLKREQ#
function
▪ Up to 9 selectable SMBus addresses (9ZXL12xx,
9ZXL0853)
▪ Selectable PLL bandwidths minimizes jitter peaking
in cascaded PLL topologies
Applications
▪ Servers/High-performance Computing
▪ Hardware/SMBus control of ZDB and FOB modes
allow change without power cycle
▪ nVME Storage
▪ Spread spectrum compatible
▪ Networking
▪ 1–400MHz FOB operation (all devices)
▪ Accelerators
▪ 100MHz and 133.33MHz ZDB mode (9ZXL12xx,
9ZXL08xx)
▪ Industrial Control
▪ 100MHz ZDB mode (9ZXL06xx)
Key Specifications
▪ -40°C to +85°C operating temperature range
▪ Fanout Buffer Mode additive phase jitter:
• PCIe Gen5 CC, UPI > 20Gb/s < 24fs RMS
• DB2000Q additive jitter < 39fs RMS
• QPI/UPI 11.4GB/s < 40fs RMS
• IF-UPI additive jitter < 70fs RMS
▪ ZDB Mode phase jitter:
▪ Packages: See Ordering Information for more
details
PCIe Cocking Architectures
▪ Common Clocked (CC)
▪ Independent Reference (IR) with and without
spread spectrum (SRIS, SRNS)
• PCIe Gen5 CC, UPI > 20Gb/s < 22fs RMS
• QPI/UPI 11.4GB/s < 120fs RMS
• IF-UPI additive jitter < 130fs RMS
▪ Cycle-to-cycle jitter < 50ps
▪ Output-to-output skew < 50ps
R31DS0159EU0102 Rev.1.02
Dec 22, 2022
Page 1
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