Datasheet > 935318974528

935318974528

更新时间： 2024-09-20 19:13:47

品牌	Logo	应用领域
恩智浦 - NXP		驱动接口集成电路
页数	文件大小	规格书
105页	2184K
描述
Buffer/Inverter Based Peripheral Driver

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935318974528 技术参数

生命周期：	Active	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.59
接口集成电路类型：	BUFFER OR INVERTER BASED PERIPHERAL DRIVER	Base Number Matches：	1

935318974528 数据手册

MC33910G5AC/MC3433910G5AC

Document Number: MC33911

Rev. 10.0, 7/2016

NXP Semiconductors

Technical Data

LIN system basis chip with DC motor

pre-driver

33911

The 33911G5/BAC is a SMARTMOS Serial Peripheral Interface (SPI) controlled

System Basis Chip (SBC), combining many frequently used functions in an MCU

based system, plus a Local Interconnect Network (LIN) transceiver. The 33911

has a 5.0 V, 50 mA/60 mA low dropout regulator with full protection and reporting

features. The device provides full SPI readable diagnostics and a selectable

timing watchdog for detecting errant operation. The LIN Protocol Specification

2.0 and 2.1 compliant LIN transceiver has waveshaping circuitry which can be

disabled for higher data rates.

SYSTEM BASIS CHIP WITH LIN

One 50 mA/60 mA high-side switch and two 150 mA/160 mA low-side switches

with output protection are available. All outputs can be pulse-width modulated

(PWM). Two high-voltage inputs are available for use in contact monitoring, or

as external wake-up inputs. These inputs can be used as high-voltage Analog

Inputs. The voltage on these pins is divided by a selectable ratio and available

via an analog multiplexer.

The 33911 has three main operating modes: Normal (all functions available),

Sleep (V_DDoff, wake-up via LIN, wake-up inputs (L1, L2), cyclic sense, and

forced wake-up), and Stop (V_DDon with limited current capability, wake-up via

CS, LIN bus, wake-up inputs, cyclic sense, forced wake-up, and external reset).

AC SUFFIX (Pb-FREE)

98ASH70029A

32-PIN LQFP

The 33911 is compatible with LIN Protocol Specification 2.0, 2.1, and

SAEJ2602-2.

Features

Applications

• Window lift

• Mirror switch

• Door lock

• Sunroof

• Full-duplex SPI interface at frequencies up to 4.0 MHz

• LIN transceiver capable of up to 100 kbps with wave shaping

• One 50 mA/60 mA high-side and two 150 mA/60 mA low-side protected

switches

• Two high-voltage analog/logic Inputs

• Configurable window watchdog

• Light control

• 5.0 V low drop regulator with fault detection and low-voltage reset (LVR)

circuitry

33911

BAT

VSENSE

VS1

VS2

HS1

LIN INTERFACE

LIN

VDD

PWMIN

ADOUT0

LS1

LS2

MCU

MOSI

MISO

SCLK

RXD

TXD

IRQ

WDCONF

RST

Figure 1. 33911 simplified application diagram

12 3 4 5 6 7...105

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