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89HPES3T3ZABCG

更新时间： 2024-01-05 10:28:43

品牌	Logo	应用领域
艾迪悌 - IDT		PC
页数	文件大小	规格书
23页	397K
描述
3-Lane 3-Port PCI Express Switch

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中文翻译

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数据手册

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89HPES3T3ZABCG 数据手册

89HPES3T3

Data Sheet

Advance Information*

3-Lane 3-Port

PCI Express® Switch

◆

Highly Integrated Solution

– Requires no external components

Device Overview

The 89HPES3T3 is a member of IDT’s PRECISE™ family of PCI

Express switching solutions. The PES3T3 is a 3-lane, 3-port peripheral

chip that performs PCI Express Base switching. It provides connectivity

and switching functions between a PCI Express upstream port and up to

four downstream ports and supports switching between downstream

ports.

– Incorporates on-chip internal memory for packet buffering and

queueing

– Integrates three 2.5 Gbps embedded SerDes with 8B/10B

encoder/decoder (no separate transceivers needed)

Reliability, Availability, and Serviceability (RAS) Features

– Internal end-to-end parity protection on all TLPs ensures data

integrity even in systems that do not implement end-to-end

CRC (ECRC)

– Supports ECRC and Advanced Error Reporting

– Supports PCI Express Native Hot-Plug, Hot-Swap capable I/O

– Compatible with Hot-Plug I/O expanders used on PC mother-

boards

◆

Features

◆

High Performance PCI Express Switch

– Three 2.5Gbps PCI Express lanes

– Three switch ports

– x1 Upstream port

– Two x1 Downstream ports

Power Management

– Utilizes advanced low-power design techniques to achieve low

typical power consumption

– Low latency cut-through switch architecture

– Support for Max payload sizes up to 256 bytes

– One virtual channel

– Supports PCI Power Management Interface specification (PCI-

– Eight traffic classes

PM 1.2)

– PCI Express Base Specification Revision 1.1 compliant

Flexible Architecture with Numerous Configuration Options

– Unused SerDes are disabled.

◆

– Supports Advanced Configuration and Power Interface Speci-

fication, Revision 2.0 (ACPI) supporting active link state

– Automatic lane reversal on all ports

Testability and Debug Features

– Built in Pseudo-Random Bit Stream (PRBS) generator

– Numerous SerDes test modes

– Automatic polarity inversion on all lanes

– Ability to load device configuration from serial EEPROM

Legacy Support

◆

– Ability to bypass link training and force any link into any mode

– Provides statistics and performance counters

– PCI compatible INTx emulation

– Bus locking

Block Diagram

3-Port Switch Core / 3 PCI Express Lanes

Port

Frame Buffer

Route Table

Arbitration

Scheduler

Transaction Layer

Data Link Layer

Mux / Demux

Transaction Layer

Data Link Layer

Mux / Demux

Data Link Layer

Mux / Demux

Phy

Logical

Layer

Logical

Layer

Logical

Layer

SerDes

(Port 2)

(Port 0)

(Port 3)

Figure 1 Internal Block Diagram

IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.

1 of 23

September 7, 2007

*Notice: The information in this document is subject to change without notice

12 3 4 5 6 7...23

中文翻译

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与89HPES3T3ZABCG相关器件

型号	品牌	获取价格	描述	数据表
89HPES3T3ZBNQ	IDT	获取价格	PCI Bus Controller, 10 X 10 MM, 0.65 MM PITCH, QFN-132
89HPES3T3ZBNQG	IDT	获取价格	暂无描述
89HPES48H12	IDT	获取价格	48-Lane 12-Port PCI Express System Interconnect Switch
89HPES48H12ZABL	IDT	获取价格	48-Lane 12-Port PCI Express System Interconnect Switch
89HPES48H12ZABLI	IDT	获取价格	48-Lane 12-Port PCI Express System Interconnect Switch
89HPES48H12ZABR	IDT	获取价格	48-Lane 12-Port PCI Express System Interconnect Switch
89HPES48H12ZABRI	IDT	获取价格	48-Lane 12-Port PCI Express System Interconnect Switch
89HPES48T12	IDT	获取价格	48-Lane 12-Port PCI Express㈢ Switch
89HPES48T12BL	IDT	获取价格	PCI Bus Controller, PBGA1156, 35 X 35 MM, 1 MM PITCH, FCBGA-1156
89HPES48T12BR	IDT	获取价格	PCI Bus Controller, PBGA1156, 35 X 35 MM, 1 MM PITCH, ROHS COMPLIANT, FCBGA-1156

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