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8432CY-11 PDF预览

8432CY-11

更新时间: 2024-11-03 21:14:55
品牌 Logo 应用领域
艾迪悌 - IDT 时钟外围集成电路晶体
页数 文件大小 规格书
20页 923K
描述
Clock Generator, 700MHz, PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBC-HD, LQFP-32

8432CY-11 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:LQFP,针数:32
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.18
JESD-30 代码:S-PQFP-G32长度:7 mm
端子数量:32最高工作温度:70 °C
最低工作温度:最大输出时钟频率:700 MHz
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
主时钟/晶体标称频率:50 MHz座面最大高度:1.6 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD宽度:7 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

8432CY-11 数据手册

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ICS8432-11  
700MHz/350MHz, Crystal-to-3.3V LVPECL  
Frequency Synthesizer  
DATA SHEET  
General Description  
Features  
The ICS8432-11 is a general purpose, dual output Crystal-to-3.3V  
Differential LVPECL High Frequency Synthesizer. The ICS8432-11  
has a selectable TEST_CLK or crystal inputs. The TEST_CLK input  
accepts LVCMOS or LVTTL levels and translates them to 3.3V  
LVPECL levels. The VCO operates at a frequency range of 200MHz  
to 700MHz. The VCO frequency is programmed in steps equal to the  
value of the input reference or crystal frequency. Output frequencies  
up to 700MHz for FOUT and 350MHz for FOUT/2 can be  
programmed using the serial or parallel interfaces to the  
configuration logic.  
Dual differential 3.3V LVPECL outputs  
Selectable crystal oscillator interface or LVCMOS/LVTTL  
TEST_CLK  
TEST_CLK can accept the following input levels: LVCMOS or  
LVTTL  
Maximum FOUT frequency: 700MHz  
Maximum FOUT/2 frequency: 350MHz  
VCO range: 200MHz to 700MHz  
Parallel interface for programming counter and VCO frequency  
multiplier and dividers  
RMS period jitter: 25ps (maximum)  
Cycle-to-cycle jitter: 65ps (maximum)  
Full 3.3V supply voltage  
0°C to 70°C ambient operating temperature  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
Pin Assignment  
Block Diagram  
Pullup  
VCO_SEL  
Pullup  
XTAL_SEL  
Pulldown  
TEST_CLK  
0
32 31 30 29 28 27 26 25  
XTAL_IN  
1
2
3
4
5
6
7
8
M5  
XTAL_IN  
24  
23  
22  
21  
20  
1
OSC  
M6  
M7  
XTAL_OUT  
TEST_CLK  
XTAL_SEL  
VCCA  
M8  
N0  
S_LOAD  
PLL  
N1  
nc  
Phase Detector  
S_DATA  
S_CLOCK  
MR  
19  
18  
17  
Pulldown  
MR  
0
FOUT  
nFOUT  
VCO  
VEE  
÷N  
9
10 11 12 13 14 15 16  
1
÷M  
FOUT/2  
nFOUT/2  
÷2  
Pulldown  
S_LOAD  
S_DATA  
S_CLOCK  
nP_LOAD  
Pulldown  
Pulldown  
Pulldown  
TEST  
Configuration Interface Logic  
ICS8432-11  
32 Lead LQFP  
7mm x 7mm x 1.4mm package body  
M5 Pullup; M[0:4, 6:8] Pulldown  
Pulldown  
M0:M8  
N0:N1  
Y Package  
Top View  
ICS8432CY-11 REVISION A DECEMBER 1, 2010  
1
©2010 Integrated Device Technology, Inc.  

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