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8430AYI-71LF PDF预览

8430AYI-71LF

更新时间: 2024-11-11 21:06:55
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
16页 211K
描述
Clock Generator, PQFP32

8430AYI-71LF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete包装说明:QFP, QFP32,.35SQ,32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.33
JESD-30 代码:S-PQFP-G32JESD-609代码:e3
湿度敏感等级:3端子数量:32
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP32,.35SQ,32封装形状:SQUARE
封装形式:FLATPACK峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
子类别:Clock Generators标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
Base Number Matches:1

8430AYI-71LF 数据手册

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ICS8430I-71  
Integrated  
Circuit  
Systems, Inc.  
700MH  
Z, LOW  
J
ITTER, CRYSTAL  
I
NTERFACE  
/
LVCMOS-TO-3.3V LVPECL FREQUENCY  
SYNTHESIZER  
GENERAL DESCRIPTION  
FEATURES  
The ICS8430I-71 is a general purpose, dual output Dual differential 3.3V LVPECL outputs  
ICS  
Crystal/LVCMOS-to-3.3V Differential LVPECL High  
Selectable crystal oscillator interface  
Frequency Synthesizer and a member of the  
or LVCMOS TEST_CLK  
HiPerClockS™  
HiPerClockS™ family of High Performance Clock  
Solutions from ICS.The ICS8430I-71 has a select-  
Output frequency up to 700MHz  
able crystal oscillator interface or LVCMOS TEST_CLK. The  
VCO operates at a frequency range of 250MHz to 700MHz.  
With the output configured to divide the VCO frequency by 2,  
output frequency steps as small as 2MHz can be achieved using  
a 16MHz crystal or test clock. Output frequencies up to 700MHz  
can be programmed using the serial or parallel interfaces to the  
configuration logic. The low jitter and frequency range of the  
ICS8430I-71 make it an ideal clock generator for most clock  
tree applications.  
Crystal input frequency range: 12MHz to 27MHz  
VCO range: 250MHz to 700MHz  
Parallel or serial interface for programming counter  
and output dividers  
RMS period jitter: 9ps (maximum)  
Cycle-to-cycle jitter: 25ps (maximum)  
3.3V supply voltage  
Lead-Free package available  
-40°C to 85°C ambient operating temperature  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
VCO_SEL  
XTAL_SEL  
VCC  
32 31 30 29 28 27 26 25  
16k  
16k  
16k  
TEST_CLK  
0
1
M5  
M6  
M7  
M8  
N0  
N1  
N2  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
XTAL1  
TEST_CLK  
XTAL_SEL  
VCCA  
VEE  
XTAL1  
XTAL2  
OSC  
ICS8430I-71  
S_LOAD  
S_DATA  
S_CLOCK  
MR  
÷ 16  
VEE  
9
10 11 12 13 14 15 16  
PLL  
PHASE DETECTOR  
0
1
VCO  
FOUT0  
nFOUT0  
FOUT1  
nFOUT1  
MR  
÷ N  
÷ M  
32-Lead LQFP  
7mm x 7mm x 1.4mm package body  
÷ 2  
Y Package  
TopView  
S_LOAD  
S_DATA  
S_CLOCK  
nP_LOAD  
CONFIGURATION  
INTERFACE  
LOGIC  
TEST  
M0:M8  
N0:N2  
8430AYI-71  
www.icst.com/products/hiperclocks.html  
REV. B JANUARY 27, 2005  
1

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