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74VHC374T PDF预览

74VHC374T

更新时间: 2024-11-05 22:56:23
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
10页 78K
描述
OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING

74VHC374T 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP-20针数:20
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.17Is Samacsys:N
系列:AHC/VHCJESD-30 代码:R-PDSO-G20
JESD-609代码:e0长度:6.5 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:100000000 Hz最大I(ol):0.008 A
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP20,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/5.5 VProp。Delay @ Nom-Sup:11.5 ns
传播延迟(tpd):18.5 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:4.4 mmBase Number Matches:1

74VHC374T 数据手册

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74VHC374  
OCTAL D-TYPE FLIP FLOP  
WITH 3 STATE OUTPUT NON INVERTING  
HIGH SPEED:  
fMAX = 270MHz (TYP.) atVCC = 5V  
LOW POWER DISSIPATION:  
ICC =4 µA (MAX.) at TA =25 oC  
HIGH NOISEIMMUNITY:  
M
T
(Micro Package)  
(TSSOPPackage)  
VNIH = VNIL =28% VCC (MIN.)  
ORDER CODES :  
POWERDOWN PROTECTIONON INPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
|IOH| = IOL = 8 mA (MIN)  
BALANCEDPROPAGATIONDELAYS:  
tPLH tPHL  
OPERATING VOLTAGERANGE:  
VCC (OPR)= 2V to 5.5V  
PIN AND FUNCTION COMPATIBLEWITH  
74 SERIES374  
74VHC374M  
74VHC374T  
setup at the D inputs.  
While the (OE) input is low, the 8 outputs will be  
in a normal logic state (high or low logic level)  
and while high level the outputs will be in a high  
impedance state.  
The output control does not affect the internal  
operation of flip flops; that is, the old data can be  
retained or the new data can be entered even  
while the outputs are off.  
Power down protection is provided on all inputs  
and 0 to 7V can be accepted on inputs with no  
regard to the supply voltage. This device can be  
used to interface5V to 3V.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
IMPROVED LATCH-UP IMMUNITY  
LOWNOISEVOLP = 0.9V(Max.)  
DESCRIPTION  
The 74VHC374 is an advanced high-speed  
CMOS OCTAL D-TYPE FLIP FLOP with 3  
STATE OUTPUT NON INVERTING fabricated  
with sub-micron silicon gate and double-layer  
metal wiring C2MOS technology.  
This 8 bit D-Type flip-flop is controlled by a clock  
input (CK) and an output enable input (OE).  
On the positive transition of the clock, the Q  
outputs will be set to the logic state that were  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
1/10  
June 1999  

74VHC374T 替代型号

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SN74AHC374PWRE4 TI

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