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74VHC4040MTCX PDF预览

74VHC4040MTCX

更新时间: 2024-11-05 23:24:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 计数器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 70K
描述
Asynchronous Up Counter

74VHC4040MTCX 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:TSSOP
包装说明:TSSOP, TSSOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.25
计数方向:UP系列:AHC/VHC/H/U/V
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:5 mm负载电容(CL):50 pF
负载/预设输入:NO逻辑集成电路类型:BINARY COUNTER
最大I(ol):0.008 A工作模式:ASYNCHRONOUS
湿度敏感等级:1位数:12
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/5.5 V
传播延迟(tpd):17.5 ns认证状态:Not Qualified
座面最大高度:1.1 mm子类别:Counters
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:NEGATIVE EDGE
宽度:4.4 mm最小 fmax:125 MHz
Base Number Matches:1

74VHC4040MTCX 数据手册

 浏览型号74VHC4040MTCX的Datasheet PDF文件第2页浏览型号74VHC4040MTCX的Datasheet PDF文件第3页浏览型号74VHC4040MTCX的Datasheet PDF文件第4页浏览型号74VHC4040MTCX的Datasheet PDF文件第5页浏览型号74VHC4040MTCX的Datasheet PDF文件第6页浏览型号74VHC4040MTCX的Datasheet PDF文件第7页 
August 1993  
Revised April 1999  
74VHC4040  
12-Stage Binary Counter  
backup. This circuit prevents device destruction due to mis-  
matched supply and input voltages.  
General Description  
The VHC4040 is an advanced high-speed CMOS device  
fabricated with silicon gate CMOS technology. It achieves  
the high-speed operation similar to equivalent Bipolar  
Schottky TTL while maintaining the CMOS low power dissi-  
pation. The VHC4040 is a 12-stage counter which incre-  
ments on the negative edge of the input clock and all  
outputs are reset to a low level by applying a logical high  
on the reset input. An input protection circuit insures that  
0V to 7V can be applied to the inputs without regard to the  
supply voltage. This device can be used to interface 5V to  
3V systems and two supply systems such as battery  
Features  
High speed; fMAX = 210 MHz at VCC = 5V  
Low power dissipation: ICC = 4 µA (max) at TA = 25°C  
High noise immunity: VNIH =VNIL = 28% VCC (min)  
Power down protection is provided on all inputs  
Wide operating voltage range: VCC (opr) = 2V 5.5V  
Low noise: VOLP = 0.8V (max)  
Pin and function compatible with 74HC4040  
Ordering Code:  
Order Number Package Number  
Package Description  
74VHC4040M  
74VHC4040MTC  
74VHC4040N  
M16A  
MTC16  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Pin Descriptions  
Pin Names  
Description  
Q0–Q11  
CP  
Flip-Flop Outputs  
Negative Edged Triggered Clock  
Master Reset  
MR  
© 1999 Fairchild Semiconductor Corporation  
DS011641.prf  
www.fairchildsemi.com  

74VHC4040MTCX 替代型号

型号 品牌 替代类型 描述 数据表
74VHC4040MTC FAIRCHILD

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