74VHC4046MTC

更新时间： 2024-09-15 22:34:03

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		信号电路锁相环或频率合成电路光电二极管
页数	文件大小	规格书
16页	223K
描述
CMOS Phase Lock Loop

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技术参数
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74VHC4046MTC 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	TSSOP	包装说明：	TSSOP, TSSOP16,.25
针数：	16	Reach Compliance Code：	unknown
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.43	其他特性：	CONTAINS THREE PHASE COMPARATORS
模拟集成电路 - 其他类型：	PHASE LOCKED LOOP	JESD-30 代码：	R-PDSO-G16
JESD-609代码：	e3	长度：	5 mm
湿度敏感等级：	1	功能数量：	1
端子数量：	16	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装等效代码：	TSSOP16,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	260	电源：	2/6 V
认证状态：	Not Qualified	座面最大高度：	1.2 mm
子类别：	PLL or Frequency Synthesis Circuits	最大供电电压 (Vsup)：	6 V
最小供电电压 (Vsup)：	2 V	标称供电电压 (Vsup)：	4.5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	4.4 mm	Base Number Matches：	1

74VHC4046MTC 数据手册

April 1994

Revised April 1999

74VHC4046

CMOS Phase Lock Loop

ing the loop out of lock, but is less likely to lock onto har-

monics than the other two comparators.

General Description

The VHC4046 is a low power phase lock loop utilizing

advanced silicon-gate CMOS technology to obtain high fre-

quency operation both in the phase comparator and VCO

sections. This device contains a low power linear voltage

controlled oscillator (VCO), a source follower, and three

phase comparators. The three phase comparators have a

common signal input and a common comparator input. The

signal input has a self biasing amplifier allowing signals to

be either capacitively coupled to the phase comparators

with a small signal or directly coupled with standard input

logic levels. This device is similar to the CD4046 except

that the Zener diode of the metal gate CMOS device has

been replaced with a third phase comparator.

In a typical application any one of the three comparators

feed an external filter network which in turn feeds the VCO

input. This input is a very high impedance CMOS input

which also drives the source follower. The VCO’s operating

frequency is set by three external components connected

to the C1_A, C1_B, R₁and R₂pins. An inhibit pin is provided

to disable the VCO and the source follower, providing a

method of putting the IC in a low power state.

The source follower is a MOS transistor whose gate is con-

nected to the VCO input and whose drain connects the

Demodulator output. This output normally is used by tying

a resistor from pin 10 to ground, and provides a means of

looking at the VCO input without loading down modifying

the characteristics of the PLL filter.

Phase Comparator I is an exclusive OR (XOR) gate. It pro-

vides a digital error signal that maintains a 90 phase shift

between the VCO’s center frequency and the input signal

(50% duty cycle input waveforms). This phase detector is

more susceptible to locking onto harmonics of the input fre-

quency than phase comparator I, but provides better noise

rejection.

Features

■ Low dynamic power consumption: (V_CC= 4.5V)

■ Maximum VCO operating frequency: 12 MHz

(V_CC= 4.5V)

Phase comparator III is an SR flip-flop gate. It can be used

to provide the phase comparator functions and is similar to

the first comparator in performance.

■ Fast comparator response time (V_CC= 4.5V)

Comparator I:

25 ns

Phase comparator II is an edge sensitive digital sequential

network. Two signal outputs are provided, a comparator

output and a phase pulse output. The comparator output is

a 3-STATE output that provides a signal that locks the VCO

output signal to the input signal with 0 phase shift between

them. This comparator is more susceptible to noise throw-

Comparator II: 30 ns

Comparator III: 25 ns

■ VCO has high linearity and high temperature stability

■ Pin and function compatible with the 74HC4046

Ordering Code:

Order Number Package Number

Package Description

74VHC4046M

74VHC4046MTC

74VHC4046N

M16A

MTC16

N16E

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

DS011675.prf

www.fairchildsemi.com

12 3 4 5 6 7...16

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74VHC4046MTC 替代型号

型号	品牌	替代类型	描述	数据表
74VHC4046MTCX	FAIRCHILD	完全替代	Analog Phase-Locked Loop
74HC4046APW,112	NXP	功能相似	74HC(T)4046A - Phase-locked-loop with VCO TSSOP 16-Pin
MC74HC4046ADT	ONSEMI	功能相似	Phase−Locked Loop

与74VHC4046MTC相关器件

型号	品牌	获取价格	描述	数据表
74VHC4046MTCX	FAIRCHILD	获取价格	Analog Phase-Locked Loop
74VHC4046MTCX_NL	FAIRCHILD	获取价格	Phase Locked Loop, CMOS, PDSO16, 4.40 MM, MO-153, TSSOP-16
74VHC4046MX	NSC	获取价格	CMOS Phase Lock Loop
74VHC4046MX_NL	FAIRCHILD	获取价格	Phase Locked Loop, CMOS, PDSO16, 0.150 INCH, MS-012, SOIC-16
74VHC4046N	NSC	获取价格	CMOS Phase Lock Loop
74VHC4046N	FAIRCHILD	获取价格	CMOS Phase Lock Loop
74VHC4046NX	NSC	获取价格	CMOS Phase Lock Loop
74VHC4051	FAIRCHILD	获取价格	8-Channel Analog Multiplexer . Dual 4-Channel Analog Multiplexer . Triple 2-Channel Analog
74VHC4051AFT	TOSHIBA	获取价格	SP8T(1:8)/Analog Multiplexer, TSSOP16B
74VHC4051M	FAIRCHILD	获取价格	8-Channel Analog Multiplexer . Dual 4-Channel Analog Multiplexer . Triple 2-Channel Analog

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