74VHC4052MX

更新时间： 2024-11-23 23:24:39

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		复用器开关复用器或开关信号电路光电二极管
页数	文件大小	规格书
11页	111K
描述
4-Channel Analog Multiplexer

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74VHC4052MX 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	SOIC	包装说明：	0.150 INCH, MS-012, SOIC-16
针数：	16	Reach Compliance Code：	unknown
HTS代码：	8542.39.00.01	风险等级：	5.1
Is Samacsys：	N	模拟集成电路 - 其他类型：	DIFFERENTIAL MULTIPLEXER
JESD-30 代码：	R-PDSO-G16	JESD-609代码：	e3
长度：	9.9 mm	湿度敏感等级：	1
负电源电压最大值（Vsup）：	-6 V	负电源电压最小值（Vsup）：
标称负供电电压 (Vsup)：	-4.5 V	信道数量：	4
功能数量：	1	端子数量：	16
标称断态隔离度：	44 dB	通态电阻匹配规范：	5 Ω
最大通态电阻 (Ron)：	120 Ω	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装等效代码：	SOP16,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	260	电源：	2/6,GND/-6 V
认证状态：	Not Qualified	座面最大高度：	1.75 mm
最大信号电流：	0.025 A	子类别：	Multiplexer or Switches
最大供电电压 (Vsup)：	6 V	最小供电电压 (Vsup)：	2 V
标称供电电压 (Vsup)：	4.5 V	表面贴装：	YES
最长断开时间：	37 ns	最长接通时间：	46 ns
切换：	BREAK-BEFORE-MAKE	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	3.9 mm	Base Number Matches：	1

74VHC4052MX 数据手册

April 1994

Revised April 1999

74VHC4051 • 74VHC4052 • 74VHC4053

8-Channel Analog Multiplexer • Dual 4-Channel Analog

Multiplexer • Triple 2-Channel Analog Multiplexer

multiplexers. The binary code placed on the A, and B

select lines determine which switch in each 4 channel sec-

tion is “on”, connecting one of the four inputs in each sec-

tion to its common output. This enables the implementation

General Description

These multiplexers are digitally controlled analog switches

implemented in advanced silicon-gate CMOS technology.

These switches have low “on” resistance and low “off” leak-

of a 4-channel differential multiplexer.

ages. They are bidirectional switches, thus any analog

VHC4053: This device contains 6 switches whose outputs

input may be used as an output and vice-versa. Also these

are connected together in pairs, thus implementing a triple

switches contain linearization circuitry which lowers the

2 channel multiplexer, or the equivalent of 3 single-pole-

“on” resistance and increases switch linearity. These

double throw configurations. Each of the A, B, or C select

devices allow control of up to ±6V (peak) analog signals

lines independently controls one pair of switches, selecting

with digital control signals of 0 to 6V. Three supply pins are

one of the two switches to be “on”.

provided for V_CC, ground, and V_EE. This enables the con-

nection of 0–5V logic signals when V_CC= 5V and an analog

Features

input range of ±5V when V_EE= 5V. All three devices also

■ Wide analog input voltage range: ±6V

have an inhibit control which when high will disable all

■ Low “on” resistance: 50 typ. (V_CC–V_EE= 4.5V)

30 typ. (V_CC–V_EE= 9V)

switches to their off state. All analog inputs and outputs

and digital inputs are protected from electrostatic damage

by diodes to V_CCand ground.

■ Logic level translation to enable 5V logic with ±5V ana-

log signals

VHC4051: This device connects together the outputs of 8

switches, thus achieving an 8 channel Multiplexer. The

binary code placed on the A, B, and C select lines deter-

mines which one of the eight switches is “on”, and con-

nects one of the eight inputs to the common output.

■ Low quiescent current: 80 µA maximum

■ Matched switch characteristic

■ Pin and function compatible with the 74HC4051/ 4052/

4053

VHC4052: This device connects together the outputs of 4

switches in two sets, thus achieving a pair of 4-channel

Ordering Code:

Order Number Package Number

Package Description

74VHC4051M

74VHC4051WM

74VHC4051MTC

74VHC4051N

M16A

M16B

MTC16

N16E

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide