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74VHC221ASJ PDF预览

74VHC221ASJ

更新时间： 2024-11-03 22:56:23
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 振荡器预分频器多谐振动器逻辑集成电路光电二极管时钟
页数 文件大小 规格书
9页 103K
描述
Dual Non-Retriggerable Monostable Multivibrator

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中文翻译

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74VHC221ASJ 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：5.30 MM, EIAJ TYPE2, SOP-16针数：16
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.45Is Samacsys：N
其他特性：NON-RETRIGGERABLE系列：AHC/VHC
JESD-30 代码：R-PDSO-G16JESD-609代码：e3
长度：10.1 mm负载电容（CL）：50 pF
逻辑集成电路类型：MONOSTABLE MULTIVIBRATOR湿度敏感等级：1
数据/时钟输入次数：2功能数量：2
端子数量：16最高工作温度：85 °C
最低工作温度：-40 °C输出极性：COMPLEMENTARY
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP16,.3封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
电源：2/5.5 V传播延迟（tpd）：27.5 ns
认证状态：Not Qualified座面最大高度：2.1 mm
子类别：Prescaler/Multivibrators最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：MATTE TIN
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：5.3 mmBase Number Matches：1

74VHC221ASJ 数据手册

 浏览型号74VHC221ASJ的Datasheet PDF文件第2页浏览型号74VHC221ASJ的Datasheet PDF文件第3页浏览型号74VHC221ASJ的Datasheet PDF文件第4页浏览型号74VHC221ASJ的Datasheet PDF文件第5页浏览型号74VHC221ASJ的Datasheet PDF文件第6页浏览型号74VHC221ASJ的Datasheet PDF文件第7页 
April 1994  
Revised May 1999  
74VHC221A  
Dual Non-Retriggerable Monostable Multivibrator  
Limits for Rx and Cx are:  
General Description  
The VHC221A is an advanced high speed CMOS  
External capacitor, Cx: No limit  
External resistors, Rx: VCC= 2.0V, 5 kΩ min  
CC > 3.0V, 1 kΩ min  
Monostable Multivibrator fabricated with silicon gate CMOS  
technology. It achieves the high speed operation similar to  
equivalent Bipolar Schottky TTL while maintaining the  
CMOS low power dissipation. Each multivibrator features  
both a negative, A, and a positive, B, transition triggered  
input, either of which can be used as an inhibit input. Also  
included is a clear input that when taken LOW resets the  
one-shot. The VHC221A can be triggered on the positive  
transition of the clear while A is held LOW and B is held  
HIGH. The VHC221A is non-retriggerable, and therefore  
cannot be retriggered until the output pulse times out. The  
output pulse width is determined by the equation:  
V
An input protection circuit ensures that 0 to 7V can be  
applied to the input pins without regard to the supply volt-  
age. This device can be used to interface 5V to 3V systems  
and two supply systems such as battery back up. This cir-  
cuit prevents device destruction due to mismatched supply  
and input voltages.  
Features  
■ High Speed: tPD = 8.1 ns (typ) at VCC = 5V  
■ Low Power Dissipation: ICC = 4 µA (Max) at TA = 25°C  
■ Active State: ICC = 600 µA (Max) at TA = 25°C  
■ High Noise Immunity: VNIH = VNIL = 28% VCC (min)  
PW = (Rx)(Cx); where PW is in seconds, R is in ohms,  
and C is in farads.  
■ Power down protection is provided on all inputs  
■ Pin and function compatible with 74HC221A  
Ordering Code:  
Order Number Package Number  
Package Description  
74VHC221AM  
74VHC221ASJ  
74VHC221AMTC  
74VHC221AN  
M16A  
M16D  
MTC16  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
© 1999 Fairchild Semiconductor Corporation  
DS011680.prf  
www.fairchildsemi.com  
1234567...9

中文翻译

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