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74VHC240M PDF预览

74VHC240M

更新时间: 2024-11-03 22:56:23
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 100K
描述
Octal Buffer/Line Driver with 3-STATE Outputs

74VHC240M 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:0.300 INCH, MS-013, SOIC-20针数:20
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.33
Is Samacsys:N控制类型:ENABLE LOW
系列:AHC/VHCJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:12.8015 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.008 A湿度敏感等级:1
位数:4功能数量:2
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:RAIL
峰值回流温度(摄氏度):260电源:2/5.5 V
Prop。Delay @ Nom-Sup:8.5 ns传播延迟(tpd):12.5 ns
认证状态:Not Qualified座面最大高度:2.642 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.493 mmBase Number Matches:1

74VHC240M 数据手册

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October 1992  
Revised April 2005  
74VHC240  
Octal Buffer/Line Driver with 3-STATE Outputs  
General Description  
Features  
The VHC240 is an advanced high speed CMOS octal bus  
buffer fabricated with silicon gate CMOS technology. It  
achieves high speed operation similar to equivalent Bipolar  
Schottky TTL while maintaining the CMOS low power dissi-  
pation. The VHC240 is an inverting 3-STATE buffer having  
two active-LOW output enables. This device is designed to  
drive buslines or buffer memory address registers.  
High Speed: tPD 3.6ns (typ) at TA 25 C  
Low power dissipation: ICC  
4 A (max) @ TA 25 C  
High noise immunity: VNIH VNIL 28% VCC (min)  
Power down protection is provided on all inputs  
Low noise: VOLP 0.9V (max)  
Pin and function compatible with 74HC240  
An input protection circuit ensures that 0V to 7V can be  
applied to the input pins without regard to the supply volt-  
age. This device can be used to interface 5V to 3V systems  
and two supply systems such as battery backup. This cir-  
cuit prevents device destruction due to mismatched supply  
and input voltages.  
Ordering Code:  
Order Number Package Number  
Package Description  
74VHC240M  
74VHC240SJ  
74VHC240MTC  
74VHC240N  
M20B  
M20D  
MTC20  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
© 2005 Fairchild Semiconductor Corporation  
DS011506  
www.fairchildsemi.com  

74VHC240M 替代型号

型号 品牌 替代类型 描述 数据表
SN74AHC240DWR TI

功能相似

OCTAL BUFFERS.DRIVERS WITH 3-STATE OUTPUTS
SN74AHC240DW TI

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OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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74VHC240MSCX TI

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Octal Buffer/Line Driver with 3-STATE Outputs
74VHC240MTC ROCHESTER

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Bus Driver, AHC/VHC Series, 2-Func, 4-Bit, Inverted Output, CMOS, PDSO20, 4.40 MM, MO-153A
74VHC240MTCX ROCHESTER

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AHC/VHC SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20, 4.40 MM, MO-153AC, TSSOP-20
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带 3 状态输出的八路缓冲器/线路驱动器
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Bus Driver, AHC/VHC Series, 2-Func, 4-Bit, Inverted Output, CMOS, PDSO20, 4.40 MM, MO-153A
74VHC240MTR FAIRCHILD

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OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (INVERTED)
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暂无描述