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74VCXH162244_05 PDF预览

74VCXH162244_05

更新时间: 2024-11-06 04:48:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器
页数 文件大小 规格书
8页 139K
描述
Low Voltage 16-Bit Buffer/Line Driver with Bushold and 26ohm Series Resistor in Outputs

74VCXH162244_05 数据手册

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January 2000  
Revised June 2005  
74VCXH162244  
Low Voltage 16-Bit Buffer/Line Driver with Bushold  
and 26: Series Resistor in Outputs  
General Description  
Features  
1.4V to 3.6V VCC supply operation  
The VCXH162244 contains sixteen non-inverting buffers  
with 3-STATE outputs to be employed as a memory and  
address driver, clock driver, or bus oriented transmitter/  
receiver. The device is nibble (4-bit) controlled. Each nibble  
has separate 3-STATE control inputs which can be shorted  
together for full 16-bit operation.  
3.6V tolerant control inputs and outputs  
Bushold on data inputs eliminates the need for external  
pull-up/pull-down resistors  
26 series resistors in outputs  
tPD  
The VCXH162244 data inputs include active bushold cir-  
cuitry, eliminating the need for external pull-up resistors to  
hold unused or floating data inputs at a valid logic level  
3.3 ns max for 3.0V to 3.6V VCC  
Static Drive (IOH/IOL  
)
The 74VCXH162244 is also designed with 26 series  
resistors in the outputs. This design reduces line noise in  
applications such as memory address drivers, clock driv-  
ers, and bus transceivers/transmitters.  
12 mA @ 3.0V VCC  
Uses patented noise/EMI reduction circuitry  
Latch-up performance exceeds 300 mA  
ESD performance:  
The 74VCXH162244 is designed for low voltage (1.4V to  
3.6V) VCC applications with output capability up to 3.6V.  
Human body model 2000V  
The 74VCXH162244 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
Machine model 200V  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74VCXH162244MTD  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
[TUBES]  
MTD48  
MTD48  
74VCXH162244MTX  
(Note 1)  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
[TAPE and REEL]  
Note 1: Use this Order Number to receive devices in Tape and Reel.  
Logic Symbol  
Pin Descriptions  
Pin Names  
Description  
OEn  
Output Enable Input (Active LOW)  
Bushold Inputs  
I0–I15  
O0–O15  
Outputs  
© 2005 Fairchild Semiconductor Corporation  
DS500231  
www.fairchildsemi.com  

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