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74VCXH162374MTD

更新时间： 2024-11-08 22:49:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器电阻器逻辑集成电路光电二极管驱动
页数 文件大小 规格书
7页 89K
描述
Low Voltage 16-Bit D-Type Flip-Flop with Bushold and 26ヘ Series Resistors in Outputs

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74VCXH162374MTD 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP, TSSOP48,.3,20
针数：48Reach Compliance Code：not_compliant
HTS代码：8542.39.00.01风险等级：5.87
系列：ALVC/VCX/AJESD-30 代码：R-PDSO-G48
JESD-609代码：e0长度：12.5 mm
负载电容（CL）：30 pF逻辑集成电路类型：BUS DRIVER
最大频率@ Nom-Sup：250000000 Hz最大I（ol）：0.012 A
湿度敏感等级：2位数：8
功能数量：2端口数量：2
端子数量：48最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE WITH SERIES RESISTOR
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP48,.3,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法：TUBE电源：3.3 V
Prop。Delay @ Nom-Sup：3.4 ns传播延迟（tpd）：9.6 ns
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：FF/Latches最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：1.65 V标称供电电压 (Vsup)：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn85Pb15)
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL触发器类型：POSITIVE EDGE
宽度：6.1 mmBase Number Matches：1

74VCXH162374MTD 数据手册

 浏览型号74VCXH162374MTD的Datasheet PDF文件第2页浏览型号74VCXH162374MTD的Datasheet PDF文件第3页浏览型号74VCXH162374MTD的Datasheet PDF文件第4页浏览型号74VCXH162374MTD的Datasheet PDF文件第5页浏览型号74VCXH162374MTD的Datasheet PDF文件第6页浏览型号74VCXH162374MTD的Datasheet PDF文件第7页 
January 2000  
Revised March 2000  
74VCXH162374  
Low Voltage 16-Bit D-Type Flip-Flop with Bushold  
and 26Ω Series Resistors in Outputs  
General Description  
Features  
■ 1.65V–3.6V VCC supply operation  
The VCXH162374 contains sixteen non-inverting D-type  
flip-flops with 3-STATE outputs and is intended for bus ori-  
ented applications. The device is byte controlled. A buff-  
ered clock (CP) and output enable (OE) are common to  
each byte and can be shorted together for full 16-bit opera-  
tion.  
■ 3.6V tolerant control inputs and outputs  
■ Bushold data inputs eliminates the need for external  
pull-up/pull-down resistors  
■ 26Ω series resistors in outputs  
■ tPD (CLK to On)  
The VCXH162374 data inputs include active bushold cir-  
cuitry, eliminating the need for external pull-up resistors to  
hold unused or floating data inputs at a valid logic level.  
3.4 ns max for 3.0V to 3.6V VCC  
4.8 ns max for 2.3V to 2.7V VCC  
9.6 ns max for 1.65V to 1.95V VCC  
The 74VCXH162374 is also designed with 26Ω series  
resistors in the outputs. This design reduces line noise in  
applications such as memory address drivers, clock drivers  
and bus transceivers/transmitters.  
■ Static Drive (IOH/IOL  
)
±12 mA @ 3.0V VCC  
±8 mA @ 2.3V VCC  
±3 mA @ 1.65V VCC  
The 74VCXH162374 is designed for low voltage (1.65V to  
3.6V) VCC applications with output compatibility up to 3.6V.  
The 74VCXH162374 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
■ Uses patented noise/EMI reduction circuitry  
■ Latch-up performance exceeds 300 mA  
■ ESD performance:  
Human body model > 2000V  
Machine model > 200V  
Ordering Code:  
Package  
Order Number  
Package Descriptions  
Number  
74VCXH162374MTD  
MTD48  
MTD48  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
[TUBES]  
74VCXH162374MTX  
(Note 1)  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
[TAPE and REEL]  
Note 1: Use this Order Number to receive devices in Tape and Reel.  
Logic Symbol  
Pin Descriptions  
Pin Names  
Description  
OEn  
Output Enable Input (Active LOW)  
Clock Pulse Input  
Bushold Inputs  
CPn  
I0–I15  
O0–O15  
Outputs  
© 2000 Fairchild Semiconductor Corporation  
DS500226  
www.fairchildsemi.com  
1234567

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