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74VCXH162245 PDF预览

74VCXH162245

更新时间: 2024-11-08 22:11:51
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线收发器输出元件输入元件
页数 文件大小 规格书
11页 275K
描述
LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS

74VCXH162245 数据手册

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74VCXH162245  
LOW VOLTAGE CMOS 16-BIT BUS TRANSCEIVER  
(3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS  
3.6V TOLERANT INPUTS AND OUTPUTS  
HIGH SPEED A OUTPUTS :  
t
t
= 3.4 ns (MAX.) at V = 3.0 to 3.6V  
PD  
CC  
= 4.3 ns (MAX.) at V = 2.3 to 2.7V  
PD  
CC  
SYMMETRICAL IMPEDANCE A OUTPUTS:  
|I | = I = 12mA (MIN) at V = 3.0V  
OH  
OL  
CC  
|I | = I = 8mA (MIN) at V = 2.3V  
TSSOP  
TUBE  
OH  
OL  
CC  
HIGH SPEED B OUTPUTS :  
t
= 2.5 ns (MAX.) at V = 3.0 to 3.6V  
PD  
CC  
t
= 3.2 ns (MAX.) at V = 2.3 to 2.7V  
PD  
CC  
ORDER CODES  
PACKAGE  
SYMMETRICAL IMPEDANCE B OUTPUTS:  
|I | = I = 24mA (MIN) at V = 3.0V  
T & R  
OH  
OL  
CC  
TSSOP  
74VCXH162245TTR  
|I | = I = 18mA (MIN) at V = 2.3V  
OH  
OL  
CC  
POWER DOWN PROTECTION ON INPUTS  
AND OUTPUTS  
26SERIE RESISTORS IN A PORT  
OUTPUT  
PIN CONNECTION  
OPERATING VOLTAGE RANGE:  
V
(OPR) = 2.3V to 3.6V  
CC  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES H162245  
BUS HOLD PROVIDED ON BOTH SIDES  
LATCH-UP PERFORMANCE EXCEEDS  
300mA (JESD 17)  
ESD PERFORMANCE:  
HBM > 2000V (MIL STD 883 method 3015);  
MM > 200V  
DESCRIPTION  
The 74VCXH162245 is a low voltage CMOS 16  
BIT BUS TRANSCEIVER (3-STATE) fabricated  
with sub-micron silicon gate and five-layer metal  
2
wiring C MOS technology. It is ideal for low power  
and very high speed 2.3 to 3.6V applications; it  
can be interfaced to 3.6V signal environment for  
both inputs and outputs.  
This IC is intended for two-way asynchronous  
communication between data buses; the direction  
of data transmission is determined by DIR input.  
The two enable inputs nG can be used to disable  
the device so that the buses are effectively  
isolated. The device circuits is including 26se-  
ries resistance in the A port outputs. These resis-  
tors permit to reduce line noise in high speed ap-  
plications. Bus hold on data inputs is provided in  
order to eliminate the need for external pull-up or  
pull-down resistor.  
July 2003  
1/11  

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