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74TVC16222ADGVRG4 PDF预览

74TVC16222ADGVRG4

更新时间： 2024-11-05 03:07:47
品牌 Logo 应用领域
德州仪器 - TI 逻辑集成电路电视光电二极管
页数 文件大小 规格书
17页 422K
描述
22-BIT VOLTAGE CLAMP

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中文翻译

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74TVC16222ADGVRG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：TSSOP, TSSOP48,.25,16针数：48
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.84Is Samacsys：N
系列：GTL/TVCJESD-30 代码：R-PDSO-G48
JESD-609代码：e4长度：9.7 mm
逻辑集成电路类型：LOGIC CIRCUIT湿度敏感等级：1
功能数量：1端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP48,.25,16封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
电源：2.1 V认证状态：Not Qualified
座面最大高度：1.2 mm子类别：Other Logic ICs
最大供电电压 (Vsup)：5 V最小供电电压 (Vsup)：0.6 V
标称供电电压 (Vsup)：2.1 V表面贴装：YES
技术：NMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.4 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：4.4 mm
Base Number Matches：1

74TVC16222ADGVRG4 数据手册

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SCDS087G − APRIL 1999 − REVISED APRIL 2005  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
D
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Member of the Texas Instruments  
WidebusFamily  
Designed to Be Used in Voltage-Limiting  
Applications  
GND  
A1  
GATE  
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6.5-Ω On-State Connection Between Ports  
A and B  
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ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
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− 1000-V Charged-Device Model (C101)  
description/ordering information  
The SN74TVC16222A provides 23 parallel  
NMOS pass transistors with a common gate. The  
low on-state resistance of the switch allows  
connections to be made with minimal propagation  
delay.  
The device can be used as a 22-bit switch, with the  
gates cascaded together to a reference transistor.  
The low-voltage side of each pass transistor is  
limited to a voltage set by the reference transistor.  
This is done to protect components with inputs  
that are sensitive to high-state voltage-level  
overshoots. (See Application Information in this  
data sheet.)  
All of the transistors in the TVC array have the same electrical characteristics; therefore, any one of them can  
be used as the reference transistor. Because, within the device, the characteristics from transistor to transistor  
are equal, the maximum output high-state voltage (V ) is approximately the reference voltage (V  
), with  
OH  
REF  
minimal deviation from one output to another. This is a benefit of the TVC solution over discrete devices.  
Because the fabrication of the transistors is symmetrical, either port connection of each bit can be used as the  
low-voltage side, and the I/O signals are bidirectional through each FET.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
Tube  
SN74TVC16222DL  
SSOP − DL  
TVC16222A  
Tape and reel  
SN74TVC16222DLR  
SN74TVC16222DGGR  
SN74TVC16222DGVR  
−40°C to 85°C  
TSSOP − DGG Tape and reel  
TVSOP − DGV Tape and reel  
TVC16222A  
TW222A  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus and TI are trademarks of Texas Instruments.  
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Copyright 2005, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...17

中文翻译

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