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74LVTH162374MTX_NL PDF预览

74LVTH162374MTX_NL

更新时间: 2024-11-25 20:08:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动信息通信管理光电二极管逻辑集成电路触发器
页数 文件大小 规格书
8页 96K
描述
Bus Driver, LVT Series, 2-Func, 8-Bit, True Output, BICMOS, PDSO48, 6.10 MM, MO-153ED, TSSOP-48

74LVTH162374MTX_NL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP48,.3,20
针数:48Reach Compliance Code:compliant
风险等级:5.28系列:LVT
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
长度:12.5 mm逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:160000000 Hz最大I(ol):0.012 A
湿度敏感等级:2位数:8
功能数量:2端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP48,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:5.3 ns
传播延迟(tpd):6.2 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:FF/Latches
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:6.1 mmBase Number Matches:1

74LVTH162374MTX_NL 数据手册

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June 2000  
Revised June 2005  
74LVTH162374  
Low Voltage 16-Bit D-Type Flip-Flop  
with 3-STATE Outputs  
and 25: Series Resistors in the Outputs  
General Description  
Features  
Input and output interface capability to systems at  
The LVTH162374 contains sixteen non-inverting D-type  
flip-flops with 3-STATE outputs and is intended for bus ori-  
ented applications. The device is byte controlled. A buff-  
ered clock (CP) and Output Enable (OE) are common to  
each byte and can be shorted together for full 16-bit opera-  
tion.  
5V VCC  
Bushold data inputs eliminate the need for external  
pull-up resistors to hold unused inputs  
Live insertion/extraction permitted  
Power Up/Power Down high impedance provides  
glitch-free bus loading  
The LVTH162374 is designed with equivalent 25 series  
resistance in both the HIGH and LOW states of the output.  
This design reduces line noise in applications such as  
memory address drivers, clock drivers, and bus transceiv-  
ers/transmitters.  
Outputs include equivalent series resistance of 25 to  
make external termination resistors unnecessary and  
reduce overshoot and undershoot  
Functionally compatible with the 74 series 16374  
Latch-up performance exceeds 500 mA  
ESD performance:  
The LVTH162374 data inputs include bushold, eliminating  
the need for external pull-up resistors to hold unused  
inputs.  
These flip-flops are designed for low-voltage (3.3V) VCC  
Human-body model 2000V  
applications, but with the capability to provide a TTL inter-  
face to a 5V environment. The LVTH162374 is fabricated  
with an advanced BiCMOS technology to achieve high  
speed operation similar to 5V ABT while maintaining a low  
power dissipation.  
Machine model 200V  
Charged-device model 1000V  
Also packaged in plastic Fine-Pitch Ball Grid Array  
(FBGA) (Preliminary)  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74LVTH162374GX  
(Note 1)  
BGA54A  
(Preliminary)  
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
[TAPE and REEL]  
74LVTH162374MEA  
74LVTH162374MEX  
74LVTH162374MTD  
74LVTH162374MTX  
MS48A  
MS48A  
MTD48  
MTD48  
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide  
[TUBES]  
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide  
[TAPE and REEL]  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
[TUBES]  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
[TAPE and REEL]  
Note 1: BGA package available in Tape and Reel only.  
© 2005 Fairchild Semiconductor Corporation  
DS500355  
www.fairchildsemi.com  

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