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74LVTH162374_07 PDF预览

74LVTH162374_07

更新时间: 2024-11-05 05:05:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
10页 237K
描述
Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs and 25ヘ Series Resistors in the Outputs

74LVTH162374_07 数据手册

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July 2007  
74LVTH162374  
tm  
Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE  
Outputs and 25Series Resistors in the Outputs  
Features  
General Description  
Input and output interface capability to systems at 5V  
The LVTH162374 contains sixteen non-inverting D-type  
flip-flops with 3-STATE outputs and is intended for bus  
oriented applications. The device is byte controlled. A  
buffered clock (CP) and Output Enable (OE) are com-  
mon to each byte and can be shorted together for full  
16-bit operation.  
V
CC  
Bushold data inputs eliminate the need for external  
pull-up resistors to hold unused inputs  
Live insertion/extraction permitted  
Power Up/Power Down high impedance provides  
The LVTH162374 is designed with equivalent 25Ω  
series resistance in both the HIGH and LOW states of  
the output. This design reduces line noise in applications  
such as memory address drivers, clock drivers, and bus  
transceivers/transmitters.  
glitch-free bus loading  
Outputs include equivalent series resistance of 25to  
make external termination resistors unnecessary and  
reduce overshoot and undershoot  
Functionally compatible with the 74 series 16374  
Latch-up performance exceeds 500mA  
ESD performance:  
The LVTH162374 data inputs include bushold, eliminat-  
ing the need for external pull-up resistors to hold unused  
inputs.  
– Human-body model > 2000V  
– Machine model > 200V  
These flip-flops are designed for low-voltage (3.3V) V  
CC  
applications, but with the capability to provide a TTL  
interface to a 5V environment. The LVTH162374 is fabri-  
cated with an advanced BiCMOS technology to achieve  
high speed operation similar to 5V ABT while maintain-  
ing a low power dissipation.  
– Charged-device model > 1000V  
Also packaged in plastic Fine-Pitch Ball Grid Array  
(FBGA) (Preliminary)  
Ordering Information  
Package  
Order Number  
Number  
Pb-Free  
Package Description  
Supplied As  
(1)  
74LVTH162374GX  
74LVTH162374MEA  
74LVTH162374MEX  
74LVTH162374MTD  
74LVTH162374MTX  
Notes:  
BGA54A  
(Preliminary)  
Yes  
54-Ball Fine-Pitch Ball Grid Array (FBGA),  
JEDEC MO-205, 5.5mm Wide  
Tape and Reel  
MS48A  
MS48A  
MTD48  
MTD48  
Yes  
Yes  
Yes  
Yes  
48-Lead Small Shrink Outline Package  
(SSOP), JEDEC MO-118, 0.300" Wide  
Tubes  
48-Lead Small Shrink Outline Package  
(SSOP), JEDEC MO-118, 0.300" Wide  
Tape and Reel  
48-Lead Thin Shrink Small Outline Package Tubes  
(TSSOP), JEDEC MO-153, 6.1mm Wide  
48-Lead Thin Shrink Small Outline Package Tape and Reel  
(TSSOP), JEDEC MO-153, 6.1mm Wide  
1. BGA package available in Tape and Reel only.  
©2000 Fairchild Semiconductor Corporation  
74LVTH162374 Rev. 1.0.0  
www.fairchildsemi.com  

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