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74LVT16652MEAX PDF预览

74LVT16652MEAX

更新时间: 2024-11-05 21:55:31
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美国国家半导体 - NSC 逻辑集成电路光电二极管输出元件信息通信管理
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7页 129K
描述
3.3V ABT 16-Bit Transceiver/Register with TRI-STATE Outputs

74LVT16652MEAX 数据手册

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ADVANCE INFORMATION  
October 1995  
74LVT16652  
3.3V ABT 16-Bit Transceiver/Register  
with TRI-STATE Outputs  
É
General Description  
Features  
Y
Input and output interface capability to systems at 5V  
V
The LVT16652 consists of sixteen bus transceiver circuits  
with D-type flip-flops, and control circuitry arranged for multi-  
plexed transmission of data directly from the input bus or  
from the internal registers. Each byte has separate control  
inputs which can be shorted together for full 16-bit opera-  
tion. Data on the A or B bus will be clocked into the registers  
as the appropriate clock pin goes to HIGH logic level. Out-  
put Enable pins (OEAB, OEBA) are provided to control the  
transceiver function.  
CC  
Y
Bus-Hold data inputs eliminate the need for external  
pull-up resistors to hold unused inputs  
Live insertion/extraction permitted  
Y
Y
Power Up/Down high impedance provides glitch-free  
bus loading  
Y
Y
Y
Y
b
a
Outputs source/sink 32 mA/ 64 mA  
Available in SSOP and TSSOP  
The transceivers are designed for low-voltage (3.3V) V  
CC  
Functionally compatible with the 74 series 16652  
Latch-up performance exceeds 500 mA  
applications, but with the capability to provide a TTL inter-  
face to a 5V environment. The LVT16652 is fabricated with  
an advanced BiCMOS technology to achieve high speed  
operation similar to 5V ABT while maintaining a low power  
dissipation.  
Connection Diagram  
Pin Assignment for  
SSOP and TSSOP  
Pin Names  
Description  
A A  
0
Data Register A Inputs/  
TRI-STATE Outputs  
Data Register B Inputs/  
TRI-STATE Outputs  
Clock Pulse Inputs  
Select Inputs  
16  
16  
B B  
0
CPAB , CPBA  
n
n
SAB , SBA  
n
n
OEAB , OEBA  
n
Output Enable Inputs  
n
SSOP EIAJ  
TSSOP JEDEC  
Order Number  
74LVT16652MEA  
74LVT16652MEAX  
74LVT16652MTD  
74LVT16652MTDX  
NS Package  
Number  
MS56A  
MTD56  
TL/F/12024–1  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1996 National Semiconductor Corporation  
TL/F/12024  
RRD-B30M17/Printed in U. S. A.  
http://www.national.com  

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