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74LVCH16244ADL,112 PDF预览

74LVCH16244ADL,112

更新时间: 2024-11-02 19:57:35
品牌 Logo 应用领域
恩智浦 - NXP 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
19页 221K
描述
74LVC16244A; 74LVCH16244A - 16-bit buffer/line driver; 5 V input/output tolerant; 3-state SSOP 48-Pin

74LVCH16244ADL,112 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SSOP包装说明:SSOP, SSOP48,.4
针数:48Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.16
控制类型:ENABLE LOW系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G48JESD-609代码:e4
长度:15.875 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.024 A
湿度敏感等级:1位数:4
功能数量:4端口数量:2
端子数量:48最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP48,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
包装方法:TUBE峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:5.5 ns
传播延迟(tpd):6 ns认证状态:Not Qualified
座面最大高度:2.8 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.2 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:7.5 mm
Base Number Matches:1

74LVCH16244ADL,112 数据手册

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74LVC16244A; 74LVCH16244A  
16-bit buffer/line driver; 5 V input/output tolerant; 3-state  
Rev. 12 — 5 March 2012  
Product data sheet  
1. General description  
The 74LVC16244A; 74LVCH16244A are 16-bit non-inverting buffer/line drivers with  
3-state bus compatible outputs. The device can be used as four 4-bit buffers, two 8-bit  
buffers or one 16-bit buffer. It features four output enable inputs, (1OE to 4OE) each  
controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a  
high-impedance OFF-state.  
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be  
applied to the outputs. These features allow the use of these devices in mixed  
3.3 V and 5 V applications.  
The 74LVCH16244A bus hold on data inputs eliminates the need for external pull-up  
resistors to hold unused inputs.  
2. Features and benefits  
5 V tolerant inputs/outputs for interfacing with 5 V logic  
Wide supply voltage range from 1.2 V to 3.6 V  
CMOS low power consumption  
Multibyte flow-through standard pin-out architecture  
Low inductance multiple power and ground pins for minimum noise and ground  
bounce  
Direct interface with TTL levels  
High-impedance when VCC = 0 V  
All data inputs have bus hold. (74LVCH16244A only)  
Complies with JEDEC standard:  
JESD8-7A (1.65 V to 1.95 V)  
JESD8-5A (2.3 V to 2.7 V)  
JESD8-C/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-B exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
Specified from 40 C to +85 C and 40 C to +125 C  
 
 

74LVCH16244ADL,112 替代型号

型号 品牌 替代类型 描述 数据表
74LVC16244ADL,118 NXP

类似代替

74LVC16244A; 74LVCH16244A - 16-bit buffer/line driver; 5 V input/output tolerant; 3-state
74LCX16244MEAX FAIRCHILD

功能相似

Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs and Outputs

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