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74LVCH16245ABQ,518 PDF预览

74LVCH16245ABQ,518

更新时间: 2024-11-25 14:47:07
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
20页 182K
描述
74LVCH16245ABQ

74LVCH16245ABQ,518 技术参数

是否Rohs认证: 符合生命周期:Obsolete
Reach Compliance Code:compliant风险等级:5.77
Base Number Matches:1

74LVCH16245ABQ,518 数据手册

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74LVC16245A; 74LVCH16245A  
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state  
Rev. 09 — 29 March 2010  
Product data sheet  
1. General description  
The 74LVC16245A; 74LVCH16245A are 16-bit transceivers featuring non-inverting  
3-state bus compatible outputs in both send and receive directions. The device features  
two output enable (nOE) inputs for easy cascading and two send/receive (nDIR) inputs for  
direction control. nOE controls the outputs so that the buses are effectively isolated. This  
device can be used as two 8-bit transceivers or one 16-bit transceiver.  
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be  
applied to the outputs. These features allow the use of these devices in mixed  
3.3 V and 5 V applications.  
The 74LVCH16245A bus hold on data inputs eliminates the need for external pull-up  
resistors to hold unused inputs.  
2. Features and benefits  
„ 5 V tolerant inputs/outputs for interfacing with 5 V logic  
„ Wide supply voltage range from 1.2 V to 3.6 V  
„ CMOS low power consumption  
„ MULTIBYTE flow-through standard pin-out architecture  
„ Low inductance multiple power and ground pins for minimum noise and ground  
bounce  
„ Direct interface with TTL levels  
„ High-impedance when VCC = 0 V  
„ All data inputs have bus hold (74LVCH16245A only)  
„ Complies with JEDEC standard JESD8-B / JESD36  
„ ESD protection:  
‹ HBM JESD22-A114F exceeds 2000 V  
‹ CDM JESD22-C101D exceeds 1000 V  
„ Specified from 40 °C to +85 °C and 40 °C to +125 °C  
 
 

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