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74LVCH16245ABQ PDF预览

74LVCH16245ABQ

更新时间: 2024-11-25 06:31:55
品牌 Logo 应用领域
恩智浦 - NXP 总线驱动器总线收发器逻辑集成电路
页数 文件大小 规格书
19页 123K
描述
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state

74LVCH16245ABQ 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFN包装说明:4 X 6 MM, 0.50 MM HEIGHT, PLASTIC, SOT1134-1, HQFN-60
针数:60Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.57
Is Samacsys:N其他特性:WITH DIRECTION CONTROL
控制类型:COMMON CONTROL计数方向:BIDIRECTIONAL
系列:LVC/LCX/ZJESD-30 代码:R-PBCC-B60
JESD-609代码:e4长度:6 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS TRANSCEIVER
最大I(ol):0.024 A湿度敏感等级:2
位数:8功能数量:2
端口数量:2端子数量:60
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:HVBCC
封装等效代码:LCC(UNSPEC)封装形状:RECTANGULAR
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:6 ns
传播延迟(tpd):6 ns认证状态:Not Qualified
座面最大高度:0.5 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.2 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:BUTT
端子节距:0.5 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:40翻译:N/A
宽度:4 mmBase Number Matches:1

74LVCH16245ABQ 数据手册

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74LVC16245A; 74LVCH16245A  
16-bit bus transceiver with direction pin; 5 V tolerant; 3-state  
Rev. 08 — 6 November 2008  
Product data sheet  
1. General description  
The 74LVC16245A; 74LVCH16245A are 16-bit transceivers featuring non-inverting  
3-state bus compatible outputs in both send and receive directions. The device features  
two output enable (nOE) inputs for easy cascading and two send/receive (nDIR) inputs for  
direction control. nOE controls the outputs so that the buses are effectively isolated. This  
device can be used as two 8-bit transceivers or one 16-bit transceiver.  
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be  
applied to the outputs. These features allow the use of these devices in mixed  
3.3 V and 5 V applications.  
The 74LVCH16245A bus hold on data inputs eliminates the need for external pull-up  
resistors to hold unused inputs.  
2. Features  
I 5 V tolerant inputs/outputs for interfacing with 5 V logic  
I Wide supply voltage range from 1.2 V to 3.6 V  
I CMOS low power consumption  
I MULTIBYTE flow-through standard pin-out architecture  
I Low inductance multiple power and ground pins for minimum noise and ground  
bounce  
I Direct interface with TTL levels  
I High-impedance when VCC = 0 V  
I All data inputs have bus hold. (74LVCH16245A only)  
I Complies with JEDEC standard JESD8-B / JESD36  
I ESD protection:  
N HBM JESD22-A114E exceeds 2000 V  
N CDM JESD22-C101C exceeds 1000 V  
I Specified from 40 °C to +85 °C and 40 °C to +125 °C  

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