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74LVC1G157GM,115 PDF预览

74LVC1G157GM,115

更新时间: 2024-11-18 15:28:07
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
18页 196K
描述
74LVC1G157 - Single 2-input multiplexer SON 6-Pin

74LVC1G157GM,115 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SON包装说明:VSON, SOLCC6,.04,20
针数:6Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.14
系列:LVC/LCX/ZJESD-30 代码:R-PDSO-N6
JESD-609代码:e3长度:1.45 mm
负载电容(CL):50 pF逻辑集成电路类型:MULTIPLEXER
最大I(ol):0.024 A湿度敏感等级:1
功能数量:1输入次数:2
输出次数:1端子数量:6
最高工作温度:125 °C最低工作温度:-40 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:VSON封装等效代码:SOLCC6,.04,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, VERY THIN PROFILE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:6.3 ns
传播延迟(tpd):13 ns认证状态:Not Qualified
座面最大高度:0.5 mm子类别:Multiplexer/Demultiplexers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:1 mm
Base Number Matches:1

74LVC1G157GM,115 数据手册

 浏览型号74LVC1G157GM,115的Datasheet PDF文件第2页浏览型号74LVC1G157GM,115的Datasheet PDF文件第3页浏览型号74LVC1G157GM,115的Datasheet PDF文件第4页浏览型号74LVC1G157GM,115的Datasheet PDF文件第5页浏览型号74LVC1G157GM,115的Datasheet PDF文件第6页浏览型号74LVC1G157GM,115的Datasheet PDF文件第7页 
74LVC1G157  
Single 2-input multiplexer  
Rev. 6 — 31 December 2012  
Product data sheet  
1. General description  
The 74LVC1G157 is a single 2-input multiplexer which select data from two data inputs (I0  
and I1) under control of a common data select input (S). The state of the common data  
select input determines the particular register from which the data comes. The output (Y)  
presents the selected data in the true (non-inverted) form.  
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these  
devices as translators in mixed 3.3 V and 5 V applications.  
This device is fully specified for partial power-down applications using IOFF  
.
The IOFF circuitry disables the output, preventing the damaging backflow current through  
the device when it is powered down.  
Schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input rise and  
fall times.  
2. Features and benefits  
Wide supply voltage range from 1.65 V to 5.5 V  
High noise immunity  
Complies with JEDEC standard:  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8B/JESD36 (2.7 V to 3.6 V)  
24 mA output drive (VCC = 3.0 V)  
CMOS low power consumption  
Latch-up performance exceeds 250 mA  
Direct interface with TTL levels  
Inputs accept voltages up to 5 V  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from 40 C to +85 C and 40 C to +125 C  
 
 

74LVC1G157GM,115 替代型号

型号 品牌 替代类型 描述 数据表
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