Datasheet > 74LVC162245A-Q100

74LVC162245A-Q100

更新时间： 2024-11-08 01:10:47

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
14页	237K
描述
16-bit transceiver with direction pin; 30 Î© series termination resistors; 5 V tolerant input/output; 3-state

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74LVC162245A-Q100 数据手册

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74LVC162245A-Q100

16-bit transceiver with direction pin; 30 Ω series termination

resistors; 5 V tolerant input/output; 3-state

Rev. 2 — 11 February 2019

Product data sheet

1. General description

The 74LVC162245A-Q100 is a 16-bit transceivers with non-inverting 3-state bus compatible

outputs in both send and receive directions. Two send/receive (nDIR) inputs control direction, and

two output enable (nOE) inputs make cascading easy. The nOE inputs control the outputs so that

the buses are effectively isolated. This device can be used as two 8-bit transceivers or one 16-bit

transceiver.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied

to the outputs. These features allow the use of these devices as translators in mixed 3.3 V and 5 V

applications.

Both HIGH and LOW output stages include 30 Ω series termination resistors to reduce line noise.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

•

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

•

5 V tolerant inputs/outputs for interfacing with 5 V logic

Wide supply voltage range from 1.2 V to 3.6 V

CMOS low power consumption

Multibyte flow-through standard pin-out architecture

Low inductance multiple power and ground pins for minimum noise and ground bounce

Direct interface with TTL levels

Integrated 30 Ω termination resistors

High-impedance when V_CC= 0 V

Complies with JEDEC standard:

•

JESD8-7A (1.65 V to 1.95 V)

JESD8-5A (2.3 V to 2.7 V)

JESD8-C/JESD36 (2.7 V to 3.6 V)

•

ESD protection:

•

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

CDM ANSI/ESDA/Jedec JS-002 exceeds 1000 V

12 3 4 5 6 7...14

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与74LVC162245A-Q100相关器件

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74LVC162373A	NXP	获取价格	16-bit D-type transparent latch with 30 ohm series termination resistors; 5 V input/output
74LVC162373ADGG	NXP	获取价格	16-bit D-type transparent latch with 30 ohm series termination resistors; 5 V input/output
74LVC162373ADGG	NEXPERIA	获取价格	16-bit D-type transparent latch; 30 Ohm series termination resistors; 5 V tolerant inputs/
74LVC162373ADGG:51	NXP	获取价格	74LVC(H)162373A - 16-bit D-type transparent latch TSSOP 48-Pin
74LVC162373ADGG-T	NXP	获取价格	IC LVC/LCX/Z SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, Bus Driver/Transceiver
74LVC162373ADL	NXP	获取价格	16-bit D-type transparent latch with 30 ohm series termination resistors; 5 V input/output
74LVC162373ADL,112	NXP	获取价格	74LVC(H)162373A - 16-bit D-type transparent latch SSOP 48-Pin
74LVC162373ADL,118	NXP	获取价格	74LVC(H)162373A - 16-bit D-type transparent latch SSOP 48-Pin
74LVC162374A	NXP	获取价格	16-bit edge triggered D-type flip-flop with 30 ohmseries termination resistors; 5 V input/
74LVC162374ADGG	NXP	获取价格	16-bit edge triggered D-type flip-flop with 30 ohmseries termination resistors; 5 V input/

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