Datasheet > 74LVC16240ADGG-Q100

74LVC16240ADGG-Q100

更新时间： 2024-11-26 11:12:27

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
12页	203K
描述
16-bit buffer/line driver with 5 V tolerant inputs/outputs; inverting; 3-stateProduction

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74LVC16240A-Q100

16-bit buffer/line driver with 5 V tolerant inputs/outputs;

inverting; 3-state

Rev. 2 — 25 April 2019

Product data sheet

1. General description

The 74LVC16240A-Q100 is a 16-bit inverting buffer/line driver with 3-state outputs. The device can

be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The device features four output

enables (1OE, 2OE, 3OE and 4OE), each controlling four of the 3-state outputs. A HIGH on nOE

causes the outputs to assume a high-impedance OFF-state.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to

the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications.

This device is fully specified for partial power-down applications using I_OFF. The I_OFFcircuitry

disables the output, preventing the damaging backflow current through the device when it is

powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

•

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

•

5 V tolerant inputs/outputs for interfacing with 5 V logic

Wide supply voltage range from 1.2 V to 3.6 V

CMOS low power consumption

MULTIBYTE flow-through standard pinout architecture

Low inductance multiple power and ground pins for minimum noise and ground bounce

Direct interface with TTL levels

Complies with JEDEC standard:

•

JESD8-7A (1.65 V to 1.95 V)

JESD8-5A (2.3 V to 2.7 V)

JESD8-C/JESD36 (2.7 V to 3.6 V)

•

ESD protection:

•

MIL-STD-883, method 3015 exceeds 2000 V

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

Description

Version

74LVC16240ADGG-Q100 -40 °C to +125 °C

TSSOP48

plastic thin shrink small outline package;

48 leads; body width 6.1 mm

SOT362-1

12 3 4 5 6 7...12

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与74LVC16240ADGG-Q100相关器件

型号	品牌	获取价格	描述	数据表
74LVC16240ADGG-T	NXP	获取价格	暂无描述
74LVC16240ADL	NXP	获取价格	16-bit buffer/line driver; inverting 3-State
74LVC16240ADL-T	ETC	获取价格	Quad 4-Bit Buffer/Driver
74LVC16241A	NXP	获取价格	16-bit buffer/line driver 3-State
74LVC16241ADGG	NXP	获取价格	16-bit buffer/line driver 3-State
74LVC16241ADGG	NEXPERIA	获取价格	16-bit buffer/line driver with 5 V tolerant i
74LVC16241ADGG,112	NXP	获取价格	74LVC16241A - 16-bit buffer/line driver with 5 V tolerant inputs/outputs; 3-state TSSOP 48
74LVC16241ADGG,118	NXP	获取价格	74LVC16241A - 16-bit buffer/line driver with 5 V tolerant inputs/outputs; 3-state TSSOP 48
74LVC16241ADGG-T	NXP	获取价格	IC LVC/LCX/Z SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48, Bus Driver/Transceiver
74LVC16241ADG-T	NXP	获取价格	IC LVC/LCX/Z SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48, 6.10 MM, PLASTIC, SOT-362-1,

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