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74LVC16241ADGG-T PDF预览

74LVC16241ADGG-T

更新时间: 2024-02-01 10:20:05
品牌 Logo 应用领域
恩智浦 - NXP 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
19页 96K
描述
IC LVC/LCX/Z SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48, Bus Driver/Transceiver

74LVC16241ADGG-T 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:ObsoleteReach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.2
其他特性:OUTPUT ENABLE ACTIVE HIGH FOR TWO FUNCTIONS系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G48JESD-609代码:e4
长度:12.5 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER湿度敏感等级:1
位数:4功能数量:4
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260传播延迟(tpd):5.4 ns
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:6.1 mm
Base Number Matches:1

74LVC16241ADGG-T 数据手册

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74LVC16241A  
16-bit buffer/line driver with 5 V tolerant inputs/outputs;  
3-state  
Rev. 03 — 16 February 2004  
Product data sheet  
1. General description  
The 74LVC16241A is a high-performance, low-power and low-voltage Si-gate CMOS  
device and superior to most advanced CMOS compatible TTL families.  
Inputs can be driven from either 3.3 V or 5 V devices. In 3-state operation, outputs can  
handle 5 V. These features allow the use of these devices in a mixed 3.3 V and 5 V  
environment.  
The 74LVC16241A is a 16-bit non-inverting buffer/line driver with 3-state outputs. The  
3-state outputs are controlled by the output enable inputs (1OE, 2OE, 3OE and 4OE).  
Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise  
and fall times. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit  
buffer.  
2. Features  
5 V tolerant inputs and outputs for interfacing with 5 V logic  
Wide supply voltage range from 1.2 V to 3.6 V  
CMOS low power consumption  
MULTIBYTE flow-through standard pin-out architecture  
Low inductance multiple power and ground pins for minimum noise and ground  
bounce  
Direct interface with TTL levels  
High-impedance outputs when VCC = 0 V  
Complies with JEDEC standard no. 8-1A  
ESD protection:  
HBM EIA/JESD22-A114-A exceeds 2000 V  
MM EIA/JESD22-A115-A exceeds 200 V.  
Specified from 40 °C to +85 °C and 40 °C to +125 °C.  

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