Datasheet > 74LCX16652MTDX

74LCX16652MTDX

更新时间： 2024-11-03 23:24:19

品牌	Logo	应用领域
其他 - ETC		总线收发器逻辑集成电路光电二极管输出元件
页数	文件大小	规格书
10页	108K
描述
Dual 8-bit Bus Transceiver

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中文翻译

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数据手册

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74LCX16652MTDX 数据手册

February 1994

Revised April 2001

74LCX16652

Low Voltage Transceiver/Register

with 5V Tolerant Inputs and Outputs

General Description

Features

■ 5V tolerant inputs and outputs

The LCX16652 contains sixteen non-inverting bidirectional

bus transceivers with 3-STATE outputs providing multi-

plexed transmission of data directly from the input bus or

from the internal registers. Data on the A or B bus will be

clocked into the registers as the appropriate clock pin goes

to the HIGH logic level. Output Enable pins (OEAB, OEBA)

are provided to control the transceiver function (see Func-

tional Description).

■ 2.3V–3.6V V_CCspecifications provided

■ 5.7 ns t_PDmax (V_CC= 3.3V), 20 µA I_CCmax

■ Power down high impedance inputs and outputs

■ Supports live insertion/withdrawal (Note 1)

■ ±24 mA output drive (V_CC= 3.0V)

■ Implements patented noise/EMI reduction circuitry

■ Latch-up performance exceeds 500 mA

■ ESD performance:

The LCX16652 is designed for low-voltage (2.5V or 3.3V)

V_CCapplications with capability of interfacing to a 5V signal

environment.

Human body model > 2000V

The LCX16652 is fabricated with an advanced CMOS tech-

nology to achieve high speed operation while maintaining

CMOS low power dissipation.

Machine model > 200V

Note 1: To ensure the high-impedance state during power up or down, OE

should be tied to V_CCand OE tied to GND through a resistor: the minimum

value or the resistor is determined by the current-sourcing capability of the

driver.

Ordering Code:

Order Number Package Number

Package Description

74LCX16652MEA

74LCX16652MTD

MS56A

MTD56

56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Pin Descriptions

Pin Names

A₀–A₁₅

B₀–B₁₅

Description

Data Register A Inputs/3-STATE Outputs

Data Register B Inputs/3-STATE Outputs

CPAB_n, CPBA_nClock Pulse Inputs

SAB_n, SBA_nSelect Inputs

OEAB_n, OEBA_nOutput Enable Inputs

DS012005

www.fairchildsemi.com

12 3 4 5 6 7...10

中文翻译

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与74LCX16652MTDX相关器件

型号	品牌	获取价格	描述	数据表
74LCX16821	FAIRCHILD	获取价格	Low Voltage 20-Bit D-Type Flip-Flop with 5V Tolerant Inputs and Outputs
74LCX16821CW	FAIRCHILD	获取价格	Bus Driver, LVC/LCX/Z Series, 2-Func, 10-Bit, True Output, CMOS
74LCX16821MEA	FAIRCHILD	获取价格	Low Voltage 20-Bit D-Type Flip-Flop with 5V Tolerant Inputs and Outputs
74LCX16821MEAX	FAIRCHILD	获取价格	20-Bit D-Type Flip-Flop
74LCX16821MEAX_NL	FAIRCHILD	获取价格	Bus Driver, LVC/LCX/Z Series, 2-Func, 10-Bit, True Output, CMOS, PDSO56, 0.300 INCH, MO-11
74LCX16821MTD	FAIRCHILD	获取价格	Low Voltage 20-Bit D-Type Flip-Flop with 5V Tolerant Inputs and Outputs
74LCX16821MTDX	FAIRCHILD	获取价格	20-Bit D-Type Flip-Flop
74LCX16841	FAIRCHILD	获取价格	Low Voltage 20-Bit Transparent Latch with 5V Tolerant Inputs and Outputs
74LCX16841CW	FAIRCHILD	获取价格	暂无描述
74LCX16841MEA	FAIRCHILD	获取价格	Low Voltage 20-Bit Transparent Latch with 5V Tolerant Inputs and Outputs

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