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74LCX16821CW PDF预览

74LCX16821CW

更新时间: 2024-11-27 13:04:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
8页 83K
描述
Bus Driver, LVC/LCX/Z Series, 2-Func, 10-Bit, True Output, CMOS

74LCX16821CW 技术参数

生命周期:Obsolete包装说明:DIE,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.72系列:LVC/LCX/Z
JESD-30 代码:X-XUUC-N56逻辑集成电路类型:BUS DRIVER
位数:10功能数量:2
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:UNSPECIFIED封装代码:DIE
封装形状:UNSPECIFIED封装形式:UNCASED CHIP
传播延迟(tpd):7.4 ns认证状态:Not Qualified
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:NO LEAD
端子位置:UPPERBase Number Matches:1

74LCX16821CW 数据手册

 浏览型号74LCX16821CW的Datasheet PDF文件第2页浏览型号74LCX16821CW的Datasheet PDF文件第3页浏览型号74LCX16821CW的Datasheet PDF文件第4页浏览型号74LCX16821CW的Datasheet PDF文件第5页浏览型号74LCX16821CW的Datasheet PDF文件第6页浏览型号74LCX16821CW的Datasheet PDF文件第7页 
January 1996  
Revised April 1999  
74LCX16821  
Low Voltage 20-Bit D-Type Flip-Flop with 5V Tolerant  
Inputs and Outputs  
General Description  
Features  
5V tolerant inputs and outputs  
The LCX16821 contains twenty non-inverting D-type flip-  
flops with 3-STATE outputs and is intended for bus oriented  
applications. The device is designed for low voltage (2.5V  
or 3.3V) VCC applications with capability of interfacing to a  
2.3V–3.6V VCC specifications provided  
6.2 ns tPD max (VCC = 3.3V), 20 µA ICC max  
Power down high impedance inputs and outputs  
Supports live insertion/withdrawal (Note 1)  
±24 mA output drive (VCC = 3.0V)  
5V signal environment.  
The LCX16821 is fabricated with an advanced CMOS tech-  
nology to achieve high speed operation while maintaining  
CMOS low power dissipation.  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
Human body model > 2000V  
Machine model > 200V  
Note 1: To ensure the high-impedance state during power up or down, OE  
should be tied to V  
through a pull-up resistor: the minimum value or the  
CC  
resistor is determined by the current-sourcing capability of the driver.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LCX16821MEA  
MS56A  
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
74LCX16821MTD  
MTD56  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Pin Descriptions  
Pin Names  
OEn  
Description  
Output Enable Input (Active LOW)  
Clock Input  
CLKn  
D0–D19  
O0–O19  
Inputs  
Outputs  
© 1999 Fairchild Semiconductor Corporation  
DS012634.prf  
www.fairchildsemi.com  

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