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74HCT74BQ,115 PDF预览

74HCT74BQ,115

更新时间: 2024-01-20 05:36:00
品牌 Logo 应用领域
恩智浦 - NXP 逻辑集成电路触发器
页数 文件大小 规格书
21页 174K
描述
74HC(T)74 - Dual D-type flip-flop with set and reset; positive-edge trigger QFN 14-Pin

74HCT74BQ,115 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:QFN包装说明:HVQCCN,
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.47
系列:HCTJESD-30 代码:R-PQCC-N14
JESD-609代码:e4长度:3 mm
逻辑集成电路类型:D FLIP-FLOP湿度敏感等级:1
位数:1功能数量:2
端子数量:14最高工作温度:125 °C
最低工作温度:-40 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装形状:RECTANGULAR封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260传播延迟(tpd):53 ns
认证状态:Not Qualified座面最大高度:1 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30触发器类型:POSITIVE EDGE
宽度:2.5 mm最小 fmax:18 MHz
Base Number Matches:1

74HCT74BQ,115 数据手册

 浏览型号74HCT74BQ,115的Datasheet PDF文件第1页浏览型号74HCT74BQ,115的Datasheet PDF文件第2页浏览型号74HCT74BQ,115的Datasheet PDF文件第4页浏览型号74HCT74BQ,115的Datasheet PDF文件第5页浏览型号74HCT74BQ,115的Datasheet PDF文件第6页浏览型号74HCT74BQ,115的Datasheet PDF文件第7页 
74HC74; 74HCT74  
NXP Semiconductors  
Dual D-type flip-flop with set and reset; positive edge-trigger  
5. Pinning information  
5.1 Pinning  
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(1) This is not a supply pin. The substrate is attached to  
this pad using conductive die attach material. There  
is no electrical or mechanical requirement to solder  
this pad. However, if it is soldered, the solder land  
should remain floating or be connected to GND.  
Fig 5. Pin configuration for DIP14, SO14 and (T)SSOP14  
Fig 6. Pin configuration for DHVQFN14  
5.2 Pin description  
Table 2.  
Symbol  
1RD  
1D  
Pin description  
Pin  
1
Description  
asynchronous reset-direct input (active LOW)  
data input  
2
1CP  
1SD  
1Q  
3
clock input (LOW-to-HIGH, edge-triggered)  
asynchronous set-direct input (active LOW)  
output  
4
5
1Q  
6
complement output  
GND  
2Q  
7
ground (0 V)  
8
complement output  
2Q  
9
output  
2SD  
2CP  
2D  
10  
11  
12  
13  
14  
asynchronous set-direct input (active LOW)  
clock input (LOW-to-HIGH, edge-triggered)  
data input  
2RD  
VCC  
asynchronous reset-direct input (active LOW)  
supply voltage  
74HC_HCT74  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 4 — 27 August 2012  
3 of 21  
 
 
 

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