Datasheet > 74HC2G34GV

74HC2G34GV

更新时间： 2024-09-16 11:13:43

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
13页	220K
描述
Dual buffer gateProduction

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数据手册

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74HC2G34GV 数据手册

74HC2G34; 74HCT2G34

Dual buffer gate

Rev. 2 — 3 February 2022

Product data sheet

1. General description

The 74HC2G34; 74HCT2G34 is a dual buffer. Inputs include clamp diodes. This enables the use of

current limiting resistors to interface inputs to voltages in excess of V_CC

2. Features and benefits

•

Wide supply voltage range from 2.0 V to 6.0 V

•

High noise immunity

CMOS low power dissipation

Balanced propagation delays

Unlimited input rise and fall times

Input levels:

•

For 74HC2G34: CMOS level

For 74HCT2G34: TTL level

•

Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

Complies with JEDEC standards

•

JESD8C (2.7 V to 3.6 V)

JESD7A (2.0 V to 6.0 V)

•

ESD protection:

•

HBM JESD22-A114-D exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

Specified from -40 °C to +85 °C and -40 °C to +125 °C

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

Description

Version

74HC2G34GW

74HCT2G34GW

74HC2G34GV

74HCT2G34GV

-40 °C to +125 °C

TSSOP6

plastic thin shrink small outline package; 6 leads;

body width 1.25 mm

SOT363-2

SC-74;

TSOP6

plastic surface-mounted package; 6 leads

SOT457

12 3 4 5 6 7...13

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