Datasheet > 74HC2G34GW-Q100H

74HC2G34GW-Q100H

更新时间： 2024-11-05 14:47:03

品牌	Logo	应用领域
恩智浦 - NXP		光电二极管逻辑集成电路
页数	文件大小	规格书
15页	126K
描述
74HC(T)2G34-Q100 - Dual buffer gate TSSOP 6-Pin

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技术参数
数据手册

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74HC2G34GW-Q100H 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
零件包装代码：	TSSOP	包装说明：	PLASTIC, SOT-363, SC-88, 6 PIN
针数：	6	Reach Compliance Code：	compliant
风险等级：	5.78	Base Number Matches：	1

74HC2G34GW-Q100H 数据手册

74HC2G34-Q100; 74HCT2G34-Q100

Dual buffer gate

Rev. 2 — 4 November 2013

Product data sheet

1. General description

The 74HC2G34-Q100; 74HCT2G34-Q100 is a dual buffer. Inputs include clamp diodes.

This enables the use of current limiting resistors to interface inputs to voltages in excess

of V_CC

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 Input levels:

 For 74HC2G34-Q100: CMOS level

 For 74HCT2G34-Q100: TTL level

 Wide supply voltage range from 2.0 V to 6.0 V

 Complies with JEDEC standard no. 7A

 High noise immunity

 ESD protection:

 MIL-STD-883, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

 Low power dissipation

 Balanced propagation delays

 Unlimited input rise and fall times

3. Ordering information

Table 1.

Ordering information

Type number

Package

Temperature range Name Description

Version

74HC2G34GW-Q100

74HCT2G34GW-Q100

74HC2G34GV-Q100

74HCT2G34GV-Q100

40 C to +125 C

SC-88 plastic surface-mounted package; 6 leads

SOT363

40 C to +125 C

SC-74 plastic surface-mounted package (TSOP6); 6 leads

SOT457

12 3 4 5 6 7...15

中文翻译

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