74F280

更新时间： 2024-11-06 22:49:47

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
5页	61K
描述
9-Bit Parity Generator/Checker

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74F280 数据手册

April 1988

Revised August 1999

74F280

9-Bit Parity Generator/Checker

General Description

The F280 is a high-speed parity generator/checker that

accepts nine bits of input data and detects whether an

even or an odd number of these inputs is HIGH. If an even

number of inputs is HIGH, the Sum Even output is HIGH. If

an odd number is HIGH, the Sum Even output is LOW. The

Sum Odd output is the complement of the Sum Even out-

put.

Ordering Code:

Order Number Package Number

Package Description

74F280SC

74F280SJ

74F280PC

M14A

M14D

N14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

DS009512

www.fairchildsemi.com

12 3 4 5

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型号	品牌	获取价格	描述	数据表
74F280_00	FAIRCHILD	获取价格	9-Bit Parity Generator/Checker
74F280B	NXP	获取价格	9-bit odd/even parity generator/checker
74F280DC	NSC	获取价格	IC F/FAST SERIES, 9-BIT PARITY GENERATOR/CHECKER, COMPLEMENTARY OUTPUT, CDIP14, Arithmetic
74F280DCQM	FAIRCHILD	获取价格	暂无描述
74F280DCQR	FAIRCHILD	获取价格	Parity Generator/Checker, F/FAST Series, 9-Bit, Complementary Output, TTL, CDIP14, CERAMIC
74F280L1C	FAIRCHILD	获取价格	Parity Generator/Checker, F/FAST Series, 9-Bit, Complementary Output, TTL, CQCC20, CERAMIC
74F280PC	FAIRCHILD	获取价格	9-Bit Parity Generator/Checker
74F280PC	NSC	获取价格	9-Bit Parity Generator/Checker
74F280PCQR	TI	获取价格	74F280PCQR
74F280SC	FAIRCHILD	获取价格	9-Bit Parity Generator/Checker