Datasheet > 74AUP2G00

74AUP2G00

更新时间： 2023-12-06 19:51:56

品牌	Logo	应用领域
美台 - DIODES		栅
页数	文件大小	规格书
9页	254K
描述
Dual 2 Input NAND Logic Gates

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74AUP2G00 数据手册

74AUP2G00

Parameter Measurement Information

From Output

Under Test

C ^L

(see Note A)

_RL=1MΩ

Inputs

V_CC

V_M

C_L

V_I

t_r/t_f

≤3ns

5, 10, 15, 30pF

0.8V

V_CC

V_CC/2

1.2V ± 0.1V

1.5V ± 0.1V

1.8V ± 0.15V

2.5V ± 0.2V

3.3V ± 0.3V

Voltage Waveform Pulse Duration

Voltage Waveform Propagation Delay Times

Inverting and Non Inverting Outputs

Figure 1 Load Circuit and Voltage Waveforms

Notes:

A. Includes test lead and test apparatus capacitance.

B. All pulses are supplied at pulse repetition rate ≤ 10 MHz.

C. Inputs are measured separately one transition per measurement.

D. t_PLHand t_PHLare the same as t_PD.

7 of 9

www.diodes.com

January 2015

74AUP2G00

Document number: DS36139 Rev 2 - 2

1...4 5 678 9

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