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74AUP1Z125GN PDF预览

74AUP1Z125GN

更新时间: 2024-01-02 01:57:30
品牌 Logo 应用领域
安世 - NEXPERIA 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
23页 326K
描述
Low-power X-tal driver with enable and internal resistor; 3-stateProduction

74AUP1Z125GN 技术参数

是否Rohs认证:符合生命周期:Transferred
零件包装代码:SON包装说明:0.90 X 1 MM, 0.35 MM HEIGHT, SOT-1115, SON-6
针数:6Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.63
Is Samacsys:N系列:AUP/ULP/V
JESD-30 代码:R-PDSO-N6JESD-609代码:e3
长度:1 mm逻辑集成电路类型:BUS DRIVER
湿度敏感等级:1位数:1
功能数量:1端口数量:2
端子数量:6最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SON封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
传播延迟(tpd):23.9 ns认证状态:Not Qualified
座面最大高度:0.35 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):0.8 V标称供电电压 (Vsup):1.1 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:TIN
端子形式:NO LEAD端子节距:0.3 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:0.9 mmBase Number Matches:1

74AUP1Z125GN 数据手册

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74AUP1Z125  
Low-power X-tal driver with enable and internal resistor;  
3-state  
Rev. 7 — 28 January 2022  
Product data sheet  
1. General description  
The 74AUP1Z125 is a crystal driver with enable, internal resistor and 3-state output. When not  
in use the EN input can be driven HIGH, putting the device in a low power disable mode with X1  
pulled HIGH via RPU, X2 set LOW and Y in the high impedance OFF-state. In disable mode the  
output Y assumes the high impedance OFF-state. Schmitt trigger action on the EN input makes the  
circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.  
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.  
2. Features and benefits  
Wide supply voltage range from 0.8 V to 3.6 V  
CMOS low power dissipation  
High noise immunity  
Complies with JEDEC standards:  
JESD8-12 (0.8 V to 1.3 V)  
JESD8-11 (0.9 V to 1.65 V)  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8C (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F Class 3A exceeds 5000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
Latch-up performance exceeds 100 mA per JESD78B Class II Level B  
Overvoltage tolerant inputs to 3.6 V  
Low noise overshoot and undershoot < 10 % of VCC  
IOFF circuitry provides partial Power-down mode operation at output Y  
Multiple package options  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74AUP1Z125GW  
74AUP1Z125GM  
74AUP1Z125GN  
74AUP1Z125GS  
-40 °C to +125 °C  
-40 °C to +125 °C  
-40 °C to +125 °C  
-40 °C to +125 °C  
TSSOP6  
plastic thin shrink small outline package; 6 leads;  
body width 1.25 mm  
SOT363-2  
XSON6  
XSON6  
XSON6  
plastic extremely thin small outline package; no leads; SOT886  
6 terminals; body 1 × 1.45 × 0.5 mm  
extremely thin small outline package; no leads;  
6 terminals; body 0.9 × 1.0 × 0.35 mm  
SOT1115  
extremely thin small outline package; no leads;  
6 terminals; body 1.0 × 1.0 × 0.35 mm  
SOT1202  
 
 
 

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