Datasheet > 74AUP1Z125GN,132

74AUP1Z125GN,132

更新时间： 2024-02-29 13:22:27

品牌	Logo	应用领域
恩智浦 - NXP		PC 驱动光电二极管逻辑集成电路
页数	文件大小	规格书
32页	259K
描述
74AUP1Z125 - Low-power X-tal driver with enable and internal resistor; 3-state SON 6-Pin

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74AUP1Z125GN,132 技术参数

74AUP1Z125

Low-power X-tal driver with enable and internal resistor;

3-state

Rev. 5 — 8 August 2012

Product data sheet

1. General description

The 74AUP1Z125 combines the functions of the 74AUP1GU04 and 74AUP1G125 with

enable circuitry and an internal bias resistor to provide a device optimized for use in

crystal oscillator applications.

When not in use the EN input can be driven HIGH, pulling up the X1 input and putting the

device in a low-power disable mode. Schmitt trigger action at the EN input makes the

circuit tolerant to slower input rise and fall times across the entire V_CCrange from 0.8 V to

3.6 V.

This device is fully specified for partial power-down applications using I_OFFat output Y.

The I_OFFcircuitry disables the output Y, preventing the damaging backflow current through

the device when it is powered down.

The integration of the two devices into the 74AUP1Z125 produces the benefits of a

compact footprint, lower power dissipation and stable operation over a wide range of

frequency and temperature.

2. Features and benefits

 Wide supply voltage range from 0.8 V to 3.6 V

 High noise immunity

 ESD protection:

 HBM JESD22-A114F Class 3A exceeds 5000 V

 MM JESD22-A115-A exceeds 200 V

 CDM JESD22-C101E exceeds 1000 V

 Latch-up performance exceeds 100 mA per JESD78B Class II

 Inputs accept voltages up to 3.6 V

 Low noise overshoot and undershoot < 10 % of V_CC

 I_OFFcircuitry provides partial power-down mode operation at output Y

 Multiple package options

 Specified from 40 C to +85 C and 40 C to +125 C

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