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74AUP1T34 PDF预览

74AUP1T34

更新时间: 2024-01-24 07:21:37
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
19页 100K
描述
Low-power dual supply translating buffer

74AUP1T34 技术参数

Source Url Status Check Date:2013-06-14 00:00:00生命周期:Obsolete
零件包装代码:TSSOT包装说明:TSSOP,
针数:5Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.43
系列:AUP/ULP/VJESD-30 代码:R-PDSO-G5
长度:2.05 mm逻辑集成电路类型:BUFFER
功能数量:2输入次数:1
端子数量:5最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟(tpd):33.5 ns
认证状态:Not Qualified座面最大高度:1.1 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.1 V
标称供电电压 (Vsup):1.2 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:1.25 mm
Base Number Matches:1

74AUP1T34 数据手册

 浏览型号74AUP1T34的Datasheet PDF文件第5页浏览型号74AUP1T34的Datasheet PDF文件第6页浏览型号74AUP1T34的Datasheet PDF文件第7页浏览型号74AUP1T34的Datasheet PDF文件第9页浏览型号74AUP1T34的Datasheet PDF文件第10页浏览型号74AUP1T34的Datasheet PDF文件第11页 
74AUP1T34  
NXP Semiconductors  
Low-power dual supply translating buffer  
11. Dynamic characteristics  
Table 8.  
Dynamic characteristics  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8.  
Symbol Parameter Conditions  
25 °C  
40 °C to +125 °C  
Max Max  
(85 °C) (125 °C)  
Unit  
Min Typ[1] Max Min  
CL = 5 pF; VCC(A) = 1.1 V to 1.3 V  
tpd propagation delay A to Y; see Figure 7  
[2]  
[2]  
[2]  
[2]  
[2]  
VCC(Y) = 1.1 V to 1.3 V  
VCC(Y) = 1.4 V to 1.6 V  
VCC(Y) = 1.65 V to 1.95 V  
VCC(Y) = 2.3 V to 2.7 V  
VCC(Y) = 3.0 V to 3.6 V  
2.6  
2.4  
2.1  
2.0  
2.1  
9.8  
7.1  
6.0  
5.1  
4.7  
25.4 2.3  
15.3 2.2  
12.7 1.9  
25.9  
16.3  
13.8  
10.5  
9.1  
25.9  
16.7  
14.3  
10.9  
9.3  
ns  
ns  
ns  
ns  
ns  
9.8  
8.8  
2.0  
1.9  
CL = 5 pF; VCC(A) = 1.4 V to 1.6 V  
tpd propagation delay A to Y; see Figure 7  
VCC(Y) = 1.1 V to 1.3 V  
VCC(Y) = 1.4 V to 1.6 V  
VCC(Y) = 1.65 V to 1.95 V  
VCC(Y) = 2.3 V to 2.7 V  
VCC(Y) = 3.0 V to 3.6 V  
2.3  
2.1  
1.8  
1.7  
1.8  
9.1  
6.4  
5.3  
4.3  
3.9  
23.9 2.0  
13.6 1.9  
10.9 1.6  
24.5  
14.7  
12.1  
8.7  
24.5  
15.2  
12.6  
9.2  
ns  
ns  
ns  
ns  
ns  
7.8  
6.6  
1.6  
1.6  
7.1  
7.5  
CL = 5 pF; VCC(A) = 1.65 V to 1.95 V  
tpd propagation delay A to Y; see Figure 7  
VCC(Y) = 1.1 V to 1.3 V  
VCC(Y) = 1.4 V to 1.6 V  
VCC(Y) = 1.65 V to 1.95 V  
VCC(Y) = 2.3 V to 2.7 V  
VCC(Y) = 3.0 V to 3.6 V  
2.2  
2.0  
1.8  
1.6  
1.7  
8.8  
6.0  
4.9  
3.9  
3.5  
23.2 1.9  
13.0 1.8  
10.3 1.5  
23.9  
14.1  
11.4  
8.0  
24.0  
14.6  
12.0  
8.5  
ns  
ns  
ns  
ns  
ns  
7.2  
5.9  
1.5  
1.5  
6.4  
6.8  
CL = 5 pF; VCC(A) = 2.3 V to 2.7 V  
tpd propagation delay A to Y; see Figure 7  
VCC(Y) = 1.1 V to 1.3 V  
VCC(Y) = 1.4 V to 1.6 V  
VCC(Y) = 1.65 V to 1.95 V  
VCC(Y) = 2.3 V to 2.7 V  
VCC(Y) = 3.0 V to 3.6 V  
2.2  
1.9  
1.7  
1.5  
1.6  
8.4  
5.7  
4.6  
3.5  
3.1  
22.8 1.9  
12.3 1.8  
23.4  
13.4  
10.7  
7.2  
23.4  
14.0  
11.2  
7.7  
ns  
ns  
ns  
ns  
ns  
9.6  
6.3  
5.1  
1.5  
1.5  
1.4  
5.6  
6.0  
CL = 5 pF; VCC(A) = 3.0 V to 3.6 V  
tpd  
propagation delay A to Y; see Figure 7  
VCC(Y) = 1.1 V to 1.3 V  
VCC(Y) = 1.4 V to 1.6 V  
VCC(Y) = 1.65 V to 1.95 V  
VCC(Y) = 2.3 V to 2.7 V  
VCC(Y) = 3.0 V to 3.6 V  
2.2  
1.9  
1.7  
1.5  
1.6  
8.1  
5.4  
4.3  
3.3  
2.9  
22.5 1.9  
12.0 1.8  
22.9  
12.9  
10.2  
6.7  
22.9  
13.4  
10.7  
7.2  
ns  
ns  
ns  
ns  
ns  
9.2  
6.0  
4.8  
1.5  
1.5  
1.4  
5.2  
5.5  
74AUP1T34_1  
© NXP B.V. 2006. All rights reserved.  
Product data sheet  
Rev. 01 — 4 December 2006  
8 of 19  

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