生命周期: | Active | 包装说明: | HVBCC, |
Reach Compliance Code: | compliant | 风险等级: | 1.6 |
系列: | AUP/ULP/V | JESD-30 代码: | R-PBCC-B6 |
长度: | 1 mm | 逻辑集成电路类型: | OR-AND GATE |
湿度敏感等级: | 1 | 功能数量: | 1 |
输入次数: | 3 | 端子数量: | 6 |
最高工作温度: | 125 °C | 最低工作温度: | -40 °C |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | HVBCC |
封装形状: | RECTANGULAR | 封装形式: | CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE |
峰值回流温度(摄氏度): | 260 | 传播延迟(tpd): | 20.1 ns |
座面最大高度: | 0.35 mm | 最大供电电压 (Vsup): | 3.6 V |
最小供电电压 (Vsup): | 0.8 V | 标称供电电压 (Vsup): | 1.1 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | AUTOMOTIVE | 端子形式: | BUTT |
端子位置: | BOTTOM | 处于峰值回流温度下的最长时间: | 30 |
宽度: | 0.8 mm | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74AUP1G3208GF,132 | NXP |
获取价格 |
74AUP1G3208 - Low-power 3-input OR-AND gate SON 6-Pin | |
74AUP1G3208GF/S500,132 | NXP |
获取价格 |
OR-AND Gate, AUP/ULP/V Series, 1-Func, 3-Input, CMOS, PDSO6 | |
74AUP1G3208GM | NXP |
获取价格 |
Low-power 3-input OR-AND gate | |
74AUP1G3208GM | NEXPERIA |
获取价格 |
Low-power 3-input OR-AND gateProduction | |
74AUP1G3208GM,132 | NXP |
获取价格 |
74AUP1G3208 - Low-power 3-input OR-AND gate SON 6-Pin | |
74AUP1G3208GN | NXP |
获取价格 |
Low-power 3-input OR-AND gate | |
74AUP1G3208GN | NEXPERIA |
获取价格 |
Low-power 3-input OR-AND gateProduction | |
74AUP1G3208GN,132 | NXP |
获取价格 |
74AUP1G3208 - Low-power 3-input OR-AND gate SON 6-Pin | |
74AUP1G3208GS | NEXPERIA |
获取价格 |
Low-power 3-input OR-AND gateProduction | |
74AUP1G3208GS | NXP |
获取价格 |
Low-power 3-input OR-AND gate |