74AHC123A-Q100;
74AHCT123A-Q100
Dual retriggerable monostable multivibrator with reset
Rev. 1 — 23 May 2013
Product data sheet
1. General description
The 74AHC123A-Q100; 74AHCT123A-Q100 are high-speed Si-gate CMOS devices and
are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in
compliance with JEDEC standard no. 7A.
The 74AHC123A-Q100; 74AHCT123A-Q100 are dual retriggerable monostable
multivibrators with output pulse width control by three methods. The selection of an
external resistor (Rext) and capacitor (Cext) program the basic pulse time. The external
resistor and capacitor are normally connected as shown in Figure 11.
Once triggered, the basic output pulse width may be extended by retriggering the gated
active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By repeating
this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made as long as
desired. Alternatively an output delay can be terminated at any time by a LOW-going edge
on input nRD, which also inhibits the triggering.
An internal connection from nRD to the input gate makes it possible to trigger the circuit by
a positive-going signal at input nRD as shown in Table 3. Figure 8 and Figure 9 illustrate
pulse control by retriggering and early reset. The values of the external timing
components Rext and Cext, determine the basic output pulse width. When Cext 10 nF, the
typical output pulse width is defined as: tW = Rext Cext where tW = pulse width in ns;
R
ext = external resistor in k; Cext = external capacitor in pF. Schmitt-trigger action at all
inputs makes the circuit highly tolerant to slower input rise and fall times.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
All inputs have a Schmitt-trigger action
Inputs accept voltages higher than VCC
DC triggered from active HIGH or active LOW inputs
Retriggerable for very long pulses up to 100 % duty factor
Direct reset terminates output pulse
For 74AHC123A-Q100 only: operates with CMOS input levels
For 74AHCT123A-Q100 only: operates with TTL input levels
ESD protection: