5秒后页面跳转
74ACT109FCQR PDF预览

74ACT109FCQR

更新时间: 2024-09-16 13:04:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
9页 102K
描述
暂无描述

74ACT109FCQR 数据手册

 浏览型号74ACT109FCQR的Datasheet PDF文件第2页浏览型号74ACT109FCQR的Datasheet PDF文件第3页浏览型号74ACT109FCQR的Datasheet PDF文件第4页浏览型号74ACT109FCQR的Datasheet PDF文件第5页浏览型号74ACT109FCQR的Datasheet PDF文件第6页浏览型号74ACT109FCQR的Datasheet PDF文件第7页 
November 1988  
Revised August 2000  
74AC109 74ACT109  
Dual JK Positive Edge-Triggered Flip-Flop  
General Description  
Features  
The AC/ACT109 consists of two high-speed completely  
independent transition clocked JK flip-flops. The clocking  
operation is independent of rise and fall times of the clock  
waveform. The JK design allows operation as a D-Type  
flip-flop (refer to AC/ACT74 data sheet) by connecting the J  
and K inputs together.  
ICC reduced by 50%  
Outputs source/sink 24 mA  
ACT109 has TTL-compatible inputs  
Asynchronous Inputs:  
LOW input to SD (Set) sets Q to HIGH level  
LOW input to CD (Clear) sets Q to LOW level  
Clear and Set are independent of clock  
Simultaneous LOW on CD and SD makes  
both Q and Q HIGH  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC109SC  
74AC109SJ  
M16A  
M16D  
MTC16  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74AC109MTC  
74AC109PC  
74ACT109SC  
74AC109MTC  
74ACT109PC  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-in-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
M16A  
MTC16  
N16E  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagram  
Pin Descriptions  
Pin Names  
Description  
Data Inputs  
J1, J2, K1, K2  
CP1, CP2  
Clock Pulse Inputs  
Direct Clear Inputs  
Direct Set Inputs  
Outputs  
C
D1, CD2  
D1, SD2  
Q1, Q2, Q1, Q2  
S
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 2000 Fairchild Semiconductor Corporation  
DS009923  
www.fairchildsemi.com  

与74ACT109FCQR相关器件

型号 品牌 获取价格 描述 数据表
74ACT109FCTR FAIRCHILD

获取价格

J-Kbar Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output
74ACT109LC FAIRCHILD

获取价格

J-Kbar Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output
74ACT109LC TI

获取价格

ACT SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CQCC20, C
74ACT109LCQR FAIRCHILD

获取价格

J-Kbar Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output
74ACT109LCT FAIRCHILD

获取价格

J-Kbar Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output
74ACT109LCX FAIRCHILD

获取价格

J-Kbar Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output
74ACT109MTC FAIRCHILD

获取价格

J-K-Type Flip-Flop
74ACT109MTCX FAIRCHILD

获取价格

J-K-Type Flip-Flop
74ACT109PC FAIRCHILD

获取价格

Dual JK Positive Edge-Triggered Flip-Flop
74ACT109PC TI

获取价格

ACT SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16, P