Datasheet > 71V25761YS166BQI

71V25761YS166BQI

更新时间： 2023-02-26 15:37:13

品牌	Logo	应用领域
艾迪悌 - IDT		静态存储器
页数	文件大小	规格书
21页	327K
描述
Cache SRAM, 128KX36, 3.5ns, CMOS, PBGA165, FBGA-165

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中文翻译

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数据手册

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71V25761YS166BQI 数据手册

128K X 36

IDT71V25761YS/S

3.3VSynchronousSRAMs

2.5V I/O, Pipelined Outputs,

Burst Counter, Single Cycle Deselect

Features

Description

◆

128K x 36 memory configuration

TheIDT71V25761arehigh-speedSRAMsorganizedas128Kx36.

The IDT71V25761 SRAMs contain write, data, address and control

registers. InternallogicallowstheSRAMtogenerateaself-timedwrite

basedupona decisionwhichcanbe leftuntilthe endofthe write cycle.

Theburstmodefeatureoffersthehighestlevelofperformancetothe

systemdesigner,astheIDT71V25761canprovidefourcyclesofdatafor

a single address presented to the SRAM. An internal burst address

counteracceptsthefirstcycleaddressfromtheprocessor,initiatingthe

◆

Supports high system speed:

Commercial:

– 200MHz 3.1ns clock access time

CommercialandIndustrial:

– 183MHz 3.3ns clock access time

– 166MHz 3.5ns clock access time

LBO input selects interleaved or linear burst mode

◆

Self-timedwritecyclewithglobalwritecontrol(GW),bytewrite accesssequence.Thefirstcycleofoutputdatawillbepipelinedforone

enable (BWE), and byte writes (BWx)

3.3V core power supply

Power down controlled by ZZ input

2.5V I/O

Optional - Boundary Scan JTAG Interface (IEEE 1149.1

Compliant)

Packaged in a JEDEC Standard 100-pin plastic thin quad CMOSprocessandarepackagedinaJEDECstandard14mmx20mm

flatpack(TQFP),119ballgridarray(BGA)and165finepitchball 100-pinthinplasticquadflatpack(TQFP)aswellasa119 ballgridarray

cycle before it is available on the next rising clock edge. If burst mode

operationisselected(ADV=LOW),thesubsequentthreecyclesofoutput

datawillbeavailabletotheuseronthenextthreerisingclockedges. The

orderofthesethreeaddressesaredefinedbytheinternalburstcounter

andthe LBO inputpin.

◆

The IDT71V25761 SRAMs utilize IDT’s latest high-performance

◆

grid array

(BGA) and 165 fine pitch ball grid array (fBGA).

PinDescriptionSummary

A0-A17

Address Inputs

Input

Output

Input

I/O

Synchronous

Asynchronous

Synchronous

N/A

Chip Enable

, CS

Chip Selects

Output Enable

Global Write Enable

Byte Write Enable

Individual Byte Write Selects

Clock

BWE

BW , BW

(1)

, BW

CLK

Burst Address Advance

Address Status (Cache Controller)

Address Status (Processor)

Linear / Interleaved Burst Order

Test Mode Select

Test Data Input

Synchronous

ADV

ADSC

ADSP

LBO

TMS

TDI

Synchronous

N/A

TCK

TDO

TRST

Test Clock

Test Data Output

Synchronous

Asynchronous

Synchronous

N/A

JTAG Reset (Optional)

Sleep Mode

I/O

-I/O31, I/OP1-I/OP4

DD, VDDQ

Data Input / Output

Core Power, I/O Power

Ground

Supply

N/A

5297 tbl 01

MAY 2010

DSC-5297/05

12 3 4 5 6 7...21

中文翻译

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与71V25761YS166BQI相关器件

型号	品牌	获取价格	描述	数据表
71V25761YS183BQ	IDT	获取价格	Cache SRAM, 128KX36, 3.3ns, CMOS, PBGA165, FBGA-165
71V25761YS183PFI	IDT	获取价格	Cache SRAM, 128KX36, 3.3ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100
71V25761YS200PF	IDT	获取价格	Cache SRAM, 128KX36, 3.1ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100
71V25761YS200PF8	IDT	获取价格	Cache SRAM, 128KX36, 3.1ns, CMOS, PQFP100, 14 X 20 MM, PLASTIC, TQFP-100
71V25761YS200PFG	IDT	获取价格	Cache SRAM, 128KX36, 3.1ns, CMOS, PQFP100, 20 X 14 MM, 1.40 MM HEIGHT, GREEN, PLASTIC, TQF
71V25761YS200PFG8	IDT	获取价格	Standard SRAM, 128KX36, 3.1ns, CMOS, PQFP100, 14 X 20 MM, GREEN, PLASTIC, TQFP-100
71V25761YSA166BG	IDT	获取价格	Cache SRAM, 128KX36, 3.5ns, CMOS, PBGA119, BGA-119
71V25761YSA166BG8	IDT	获取价格	Cache SRAM, 128KX36, 3.5ns, CMOS, PBGA119, BGA-119
71V25761YSA166BGG	IDT	获取价格	Cache SRAM, 128KX36, 3.5ns, CMOS, PBGA119, 22 X 14 MM, GREEN, PLASTIC, MS-028AA, BGA-119
71V25761YSA166BGG8	IDT	获取价格	Cache SRAM, 128KX36, 3.5ns, CMOS, PBGA119, 22 X 14 MM, GREEN, PLASTIC, MS-028AA, BGA-119

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